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authorSudhakar Rajashekhara <sudhakar.raj@ti.com>2010-01-21 15:05:20 +0530
committerSudhakar Rajashekhara <sudhakar.raj@ti.com>2010-01-21 15:26:28 +0530
commit6b7a97cbd0568cd156db994eeec0f706d20aa76d (patch)
treeffc9c6f6431afc67f5dfd2319a4a12e1fd65c5d8
parent4312018de5b3f5370d8776d0a8d21d4bc8b24f4d (diff)
From: Sekhar Nori <nsekhar@ti.com>
u-boot: da850/omap-l138: include provision to wake up DSP. DSP is woken-up by default on DA850/OMAP-L138. To prevent DSP from being woken up, set the environment variable dspwake to no. Signed-off-by: Sudhakar Rajashekhara <sudhakar.raj@ti.com>
-rw-r--r--board/davinci/da8xxevm/da850evm.c48
-rw-r--r--include/asm-arm/arch-davinci/hardware.h4
2 files changed, 52 insertions, 0 deletions
diff --git a/board/davinci/da8xxevm/da850evm.c b/board/davinci/da8xxevm/da850evm.c
index 5fed7f531c..e9e8d7fee5 100644
--- a/board/davinci/da8xxevm/da850evm.c
+++ b/board/davinci/da8xxevm/da850evm.c
@@ -371,6 +371,52 @@ int rmii_hw_init(void)
}
#endif
+void dsp_lpsc_on(unsigned domain, unsigned int id)
+{
+ dv_reg_p mdstat, mdctl, ptstat, ptcmd;
+ struct davinci_psc_regs *psc_regs;
+
+ psc_regs = davinci_psc0_regs;
+ mdstat = &psc_regs->psc0.mdstat[id];
+ mdctl = &psc_regs->psc0.mdctl[id];
+ ptstat = &psc_regs->ptstat;
+ ptcmd = &psc_regs->ptcmd;
+
+ while (*ptstat & (0x1 << domain)) {;}
+
+ if ((*mdstat & 0x1f) == 0x03)
+ return; /* Already on and enabled */
+
+ *mdctl |= 0x03;
+
+ *ptcmd = 0x1 << domain;
+
+ while (*ptstat & (0x1 << domain)) {;}
+ while ((*mdstat & 0x1f) != 0x03) {;} /* Probably an overkill... */
+}
+
+static void dspwake(void)
+{
+ unsigned *resetvect = (unsigned *)DAVINCI_L3CBARAM_BASE;
+
+ /* if the device is ARM only, return */
+ if ((REG(CHIP_REV_ID_REG) & 0x3f) == 0x10)
+ return;
+
+ if (!strcmp(getenv("dspwake"), "no"))
+ return;
+
+ *resetvect++ = 0x1E000; /* DSP Idle */
+ /* clear out the next 10 words as NOP */
+ memset(resetvect, 0, sizeof(unsigned) * 10);
+
+ /* setup the DSP reset vector */
+ REG(HOST1CFG) = DAVINCI_L3CBARAM_BASE;
+
+ dsp_lpsc_on(1, DAVINCI_LPSC_GEM);
+ REG(PSC0_MDCTL + (15 * 4)) |= 0x100;
+}
+
int misc_init_r(void)
{
uint8_t tmp[20], addr[10];
@@ -398,6 +444,8 @@ int misc_init_r(void)
printf("RMII hardware init failed!!!\n");
#endif
+ dspwake();
+
return (0);
}
diff --git a/include/asm-arm/arch-davinci/hardware.h b/include/asm-arm/arch-davinci/hardware.h
index f22a77dac4..e36c15bf11 100644
--- a/include/asm-arm/arch-davinci/hardware.h
+++ b/include/asm-arm/arch-davinci/hardware.h
@@ -150,8 +150,12 @@ typedef volatile unsigned int * dv_reg_p;
#define DAVINCI_DDR_EMIF_DATA_BASE 0xc0000000
#define DAVINCI_INTC_BASE 0xfffee000
#define DAVINCI_BOOTCFG_BASE 0x01c14000
+#define DAVINCI_L3CBARAM_BASE 0x80000000
#define JTAG_ID_REG (DAVINCI_BOOTCFG_BASE + 0x18)
+#define CHIP_REV_ID_REG (DAVINCI_BOOTCFG_BASE + 0x24)
+#define HOST1CFG (DAVINCI_BOOTCFG_BASE + 0x44)
#define CFGCHIP3 (DAVINCI_BOOTCFG_BASE + 0x188)
+#define PSC0_MDCTL (DAVINCI_PSC0_BASE + 0xa00)
#define GPIO_BANK2_REG_DIR_ADDR (DAVINCI_GPIO_BASE + 0x38)
#define GPIO_BANK2_REG_OPDATA_ADDR (DAVINCI_GPIO_BASE + 0x3c)
#define GPIO_BANK2_REG_SET_ADDR (DAVINCI_GPIO_BASE + 0x40)