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authorLiu Ying <Ying.Liu@freescale.com>2012-09-14 13:26:04 +0800
committerLiu Ying <Ying.Liu@freescale.com>2012-09-27 11:10:31 +0800
commit306f1510e63b6d3dd793dbef0b05cda6c92078e9 (patch)
treeee76ddbd466ed98fcd81569cc5f0f63d5572a12a
parentfa125315785c2069dd7b85a51bcfd1c9a78db97b (diff)
ENGR00223797-3 IPUv3:Wait for sw reset finish
This patch checks self-clear sw_ipu_rst bit in SCR register of SRC controller to be cleared after setting it to reset IPUv3. This makes sure that IPUv3 finishes sofware resetting. Signed-off-by: Liu Ying <Ying.Liu@freescale.com>
-rw-r--r--drivers/video/ipu_common.c5
1 files changed, 4 insertions, 1 deletions
diff --git a/drivers/video/ipu_common.c b/drivers/video/ipu_common.c
index 79d87e3d69..2a1d9609a6 100644
--- a/drivers/video/ipu_common.c
+++ b/drivers/video/ipu_common.c
@@ -6,7 +6,7 @@
*
* Linux IPU driver
*
- * (C) Copyright 2005-2011 Freescale Semiconductor, Inc.
+ * (C) Copyright 2005-2012 Freescale Semiconductor, Inc.
*
* See file CREDITS for list of people who contributed to this
* project.
@@ -363,6 +363,9 @@ void ipu_reset(void)
value = __raw_readl(reg);
value = value | SW_IPU_RST;
__raw_writel(value, reg);
+
+ while (__raw_readl(reg) & SW_IPU_RST)
+ ;
}
/*