diff options
| author | Jason Liu <r64343@freescale.com> | 2012-12-10 13:29:05 +0800 |
|---|---|---|
| committer | Jason Liu <r64343@freescale.com> | 2012-12-10 13:56:10 +0800 |
| commit | 0daf8bc6b77575581936a59e18476c48742669f0 (patch) | |
| tree | adfbb5c62a9ff2da300aa470772dec83205d2eef | |
| parent | c738932446765f46c050e30df9d29e5fcc988d79 (diff) | |
ENGR00236337: mx6/clock: emi_slow clock rate is not printed out correctly
This issue due to PODF is not used correcly, need use the following instead:
ACLK_EMI_SLOW_PODF_OFFSET, the original used ACLK_EMI_PODF_OFFSET was wrong.
Signed-off-by: Jason Liu <r64343@freescale.com>
| -rw-r--r-- | cpu/arm_cortexa8/mx6/generic.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/cpu/arm_cortexa8/mx6/generic.c b/cpu/arm_cortexa8/mx6/generic.c index 134217d62e..257c9308a7 100644 --- a/cpu/arm_cortexa8/mx6/generic.c +++ b/cpu/arm_cortexa8/mx6/generic.c @@ -286,7 +286,7 @@ static u32 __get_emi_slow_clk(void) u32 emi_clk_sel = (cscmr1 & MXC_CCM_CSCMR1_ACLK_EMI_SLOW_MASK) >> MXC_CCM_CSCMR1_ACLK_EMI_SLOW_OFFSET; u32 podf = (cscmr1 & MXC_CCM_CSCMR1_ACLK_EMI_SLOW_PODF_MASK) >> - MXC_CCM_CSCMR1_ACLK_EMI_PODF_OFFSET; + MXC_CCM_CSCMR1_ACLK_EMI_SLOW_PODF_OFFSET; switch (emi_clk_sel) { default: |