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authorRyan QIAN <b32804@freescale.com>2012-06-06 08:18:29 +0800
committerJustin Waters <justin.waters@timesys.com>2012-09-12 11:05:51 -0400
commitae6473b3cb1c8c786ca94b110f18e8425f3caf3f (patch)
treede4f76246b050c11a7a675a407faad7c5f06ab94
parent0803f29aec4fcfa8de918da2c7b0ec566214a5f9 (diff)
ENGR00212229 [MX6SL_ARM2]uboot: 8bit MMC cards failed to boot on SD1.
issue: SD1 connector on ARM2 is an MS-SD combo one which can not make good contact with DAT4~DAT7 of 8bit mmc cards. It is an hw limitation which will cause boot failure from 8bit mmc. solution: disable SD1 8bit mode on MX6SL arm2 board. Signed-off-by: Ryan QIAN <b32804@freescale.com>
-rw-r--r--include/configs/mx6sl_arm2.h4
-rw-r--r--include/configs/mx6sl_arm2_mfg.h4
2 files changed, 4 insertions, 4 deletions
diff --git a/include/configs/mx6sl_arm2.h b/include/configs/mx6sl_arm2.h
index 64856098bd..c5b08920b9 100644
--- a/include/configs/mx6sl_arm2.h
+++ b/include/configs/mx6sl_arm2.h
@@ -212,8 +212,8 @@
/* detect whether SD1, 2, or 3 is boot device */
#define CONFIG_DYNAMIC_MMC_DEVNO
- /* SD1 is 8 bit */
- #define CONFIG_MMC_8BIT_PORTS 0x3
+ /* SD2 is 8 bit */
+ #define CONFIG_MMC_8BIT_PORTS 0x2
/* Setup target delay in DDR mode for each SD port */
#define CONFIG_GET_DDR_TARGET_DELAY
#endif
diff --git a/include/configs/mx6sl_arm2_mfg.h b/include/configs/mx6sl_arm2_mfg.h
index 804a36a49a..5b44d253e7 100644
--- a/include/configs/mx6sl_arm2_mfg.h
+++ b/include/configs/mx6sl_arm2_mfg.h
@@ -201,8 +201,8 @@
/* detect whether SD1, 2, or 3 is boot device */
#define CONFIG_DYNAMIC_MMC_DEVNO
- /* SD1 is 8 bit */
- #define CONFIG_MMC_8BIT_PORTS 0x3
+ /* SD2 is 8 bit */
+ #define CONFIG_MMC_8BIT_PORTS 0x2
/* Setup target delay in DDR mode for each SD port */
#define CONFIG_GET_DDR_TARGET_DELAY
#endif