diff options
| author | Huang Shijie <b32955@freescale.com> | 2012-08-17 10:21:18 +0800 |
|---|---|---|
| committer | Justin Waters <justin.waters@timesys.com> | 2012-09-12 11:05:55 -0400 |
| commit | 4e21e47a5d63058e78e31a88d95fd45f0bd846e5 (patch) | |
| tree | 270a55cfaabf218a784202149ef199a30ae75f8f | |
| parent | eb000ecb5daea75bb38fef2def1e131d3f25add5 (diff) | |
ENGR00217505-8 uboot: MX6Q-ARD: set the default gpmi clock to 20MHz
Set the default clock to 20MHz. The 11Mhz is too slow.
Signed-off-by: Huang Shijie <b32955@freescale.com>
| -rw-r--r-- | board/freescale/mx6q_sabreauto/mx6q_sabreauto.c | 5 |
1 files changed, 2 insertions, 3 deletions
diff --git a/board/freescale/mx6q_sabreauto/mx6q_sabreauto.c b/board/freescale/mx6q_sabreauto/mx6q_sabreauto.c index 8c761c126d..3fb68cd114 100644 --- a/board/freescale/mx6q_sabreauto/mx6q_sabreauto.c +++ b/board/freescale/mx6q_sabreauto/mx6q_sabreauto.c @@ -532,11 +532,10 @@ int setup_gpmi_nand(void) mxc_iomux_v3_setup_multiple_pads(nfc_pads, ARRAY_SIZE(nfc_pads)); - - /* config gpmi and bch clock to 11Mhz*/ + /* config gpmi and bch clock to 20Mhz, from pll2 400M pfd*/ reg = readl(CCM_BASE_ADDR + CLKCTL_CS2CDR); reg &= 0xF800FFFF; - reg |= 0x01E40000; + reg |= 0x02630000; writel(reg, CCM_BASE_ADDR + CLKCTL_CS2CDR); /* enable gpmi and bch clock gating */ |