diff options
| author | Poonam Aggrwal <poonam.aggrwal@freescale.com> | 2009-10-07 15:47:42 -0400 |
|---|---|---|
| committer | Justin Waters <justin.waters@timesys.com> | 2009-10-07 15:47:42 -0400 |
| commit | c59d3ede8b3d03a2c046d99b2ac66515e2e9af3d (patch) | |
| tree | b64d2ee2e9887897185aabdda9f249dc3199a232 | |
| parent | e60beb13cf0135dc71c541021487b5ccc4d269cb (diff) | |
u-boot-2009.03-p2020rdb-GPIO-registers-to-mpc85xx-map
Adds GPIO registers to MPC85xx memory map
| -rw-r--r-- | include/asm-ppc/immap_85xx.h | 13 |
1 files changed, 12 insertions, 1 deletions
diff --git a/include/asm-ppc/immap_85xx.h b/include/asm-ppc/immap_85xx.h index 094fb9c5d6..96eff94b1f 100644 --- a/include/asm-ppc/immap_85xx.h +++ b/include/asm-ppc/immap_85xx.h @@ -1,7 +1,7 @@ /* * MPC85xx Internal Memory Map * - * Copyright 2007 Freescale Semiconductor. + * Copyright 2007-2009 Freescale Semiconductor. * * Copyright(c) 2002,2003 Motorola Inc. * Xianghua Xiao (x.xiao@motorola.com) @@ -325,6 +325,15 @@ typedef struct ccsr_pcix { char res11[476]; } ccsr_pcix_t; +typedef struct ccsr_gpio { + uint gpdir; + uint gpodr; + uint gpdat; + uint gpier; + uint gpimr; + uint gpicr; +} ccsr_gpio_t; + #define PCIX_COMMAND 0x62 #define POWAR_EN 0x80000000 #define POWAR_IO_READ 0x00080000 @@ -1686,6 +1695,8 @@ typedef struct ccsr_gur { #define CONFIG_SYS_MPC85xx_PCIX_ADDR (CONFIG_SYS_IMMR + CONFIG_SYS_MPC85xx_PCIX_OFFSET) #define CONFIG_SYS_MPC85xx_PCIX2_OFFSET (0x9000) #define CONFIG_SYS_MPC85xx_PCIX2_ADDR (CONFIG_SYS_IMMR + CONFIG_SYS_MPC85xx_PCIX2_OFFSET) +#define CONFIG_SYS_MPC85xx_GPIO_OFFSET (0xF000) +#define CONFIG_SYS_MPC85xx_GPIO_ADDR (CONFIG_SYS_IMMR + CONFIG_SYS_MPC85xx_GPIO_OFFSET) #define CONFIG_SYS_MPC85xx_SATA1_OFFSET (0x18000) #define CONFIG_SYS_MPC85xx_SATA1_ADDR (CONFIG_SYS_IMMR + CONFIG_SYS_MPC85xx_SATA1_OFFSET) #define CONFIG_SYS_MPC85xx_SATA2_OFFSET (0x19000) |