OMAP3EVM: Added detection for New-Old EVM

Changes -
	- Depending on EVM (new/Old) reset the Eth PHY
		- Old : GPIO 64
		- New : GPIO 8
	- Change the pad conf for GPIO8

Known Issues-
	- On EVM Revc board it has been observed that the GPMC read fails, it
	  most of the time (3 out of 5) reads all 1's. Due to this the ethernet
	  reset fails.

	  Same thing works fine on rev-D board.

2 files changed, 55 insertions, 10 deletions

diff --git a/board/omap3/evm/evm.c b/board/omap3/evm/evm.c
index 3a27c8fe5d..19ea6d51b2 100644
--- a/board/omap3/evm/evm.c
+++ b/board/omap3/evm/evm.c
@@ -53,6 +53,30 @@ int board_init(void)
 	return 0;
 }
 
+
+static int omap3evm_board_rev(void)
+{
+       unsigned int smsc_id;
+       /*
+        * The run time detection of EVM revision is done by reading Ethernet
+        * PHY ID -
+        *      GEN_1   = 0x01150000
+        *      GEN_2   = 0x92200000
+        */
+       smsc_id = readl(CONFIG_DRIVER_SMC911X_BASE + 0x50) & 0xFFFF0000;
+
+       switch (smsc_id) {
+       /*SMSC9115 chipset*/
+       case 0x01150000:
+               return OMAP3EVM_BOARD_GEN_1;
+       /*SMSC 9220 chipset*/
+       case 0x92200000:
+               return OMAP3EVM_BOARD_GEN_2;
+       default:
+               return OMAP3EVM_BOARD_GEN_1;
+       }
+}
+
 /******************************************************************************
  * Routine: misc_init_r
  * Description: Init ethernet (done here so udelay works)
@@ -91,7 +115,6 @@ void set_muxconf_regs(void)
  *****************************************************************************/
 static void setup_net_chip(void)
 {
-	gpio_t *gpio3_base = (gpio_t *)OMAP34XX_GPIO3_BASE;
 	gpmc_csx_t *gpmc_cs6_base = (gpmc_csx_t *)GPMC_CONFIG_CS6_BASE;
 	ctrl_t *ctrl_base = (ctrl_t *)OMAP34XX_CTRL_BASE;
 
@@ -112,13 +135,30 @@ static void setup_net_chip(void)
 	writew(readw(&ctrl_base->gpmc_nadv_ale) | 0x0E00,
 		&ctrl_base->gpmc_nadv_ale);
 
-	/* Make GPIO 64 as output pin */
-	writel(readl(&gpio3_base->oe) & ~(GPIO0), &gpio3_base->oe);
+       if (omap3evm_board_rev() >= OMAP3EVM_BOARD_GEN_2) {
+               unsigned int *gpio1_base = (unsigned int *)OMAP34XX_GPIO1_BASE;
+               /* Make GPIO8/SYS_BOOT5 as output pin */
+               writel(readl(gpio1_base + OFFS(GPIO_OE)) & ~(GPIO7),
+                               gpio1_base + OFFS(GPIO_OE));
+
+               /* Now send a pulse on the GPIO pin */
+               writel(GPIO7, gpio1_base + OFFS(GPIO_SETDATAOUT));
+               udelay(1);
+               writel(GPIO7, gpio1_base + OFFS(GPIO_CLEARDATAOUT));
+               udelay(1);
+               writel(GPIO7, gpio1_base + OFFS(GPIO_SETDATAOUT));
+       } else {
+               unsigned int *gpio3_base = (unsigned int *)OMAP34XX_GPIO3_BASE;
+               /* Make GPIO 64 as output pin */
+               writel(readl(gpio3_base + OFFS(GPIO_OE)) & ~(GPIO0),
+                               gpio3_base + OFFS(GPIO_OE));
 
-	/* Now send a pulse on the GPIO pin */
-	writel(GPIO0, &gpio3_base->setdataout);
-	udelay(1);
-	writel(GPIO0, &gpio3_base->cleardataout);
-	udelay(1);
-	writel(GPIO0, &gpio3_base->setdataout);
+               /* Now send a pulse on the GPIO pin */
+               writel(GPIO0, gpio3_base + OFFS(GPIO_SETDATAOUT));
+               udelay(1);
+               writel(GPIO0, gpio3_base + OFFS(GPIO_CLEARDATAOUT));
+               udelay(1);
+               writel(GPIO0, gpio3_base + OFFS(GPIO_SETDATAOUT));
+       }
 }
+
diff --git a/board/omap3/evm/evm.h b/board/omap3/evm/evm.h
index 199824f4c4..4801aa6629 100644
--- a/board/omap3/evm/evm.h
+++ b/board/omap3/evm/evm.h
@@ -35,6 +35,11 @@ const omap3_sysinfo sysinfo = {
 #endif
 };
 
+enum {
+       OMAP3EVM_BOARD_GEN_1 = 0, /* EVM Rev between  A - D*/
+       OMAP3EVM_BOARD_GEN_2,   /* EVM Rev >= Rev E*/
+};
+
 static void setup_net_chip(void);
 
 /*
@@ -295,7 +300,7 @@ static void setup_net_chip(void);
  MUX_VAL(CP(SYS_BOOT2),		(IEN  | PTD | DIS | M4)) /*GPIO_4*/\
  MUX_VAL(CP(SYS_BOOT3),		(IEN  | PTD | DIS | M4)) /*GPIO_5*/\
  MUX_VAL(CP(SYS_BOOT4),		(IEN  | PTD | DIS | M4)) /*GPIO_6*/\
- MUX_VAL(CP(SYS_BOOT5),		(IEN  | PTD | DIS | M4)) /*GPIO_7*/\
+ MUX_VAL(CP(SYS_BOOT5),		(IEN  | PTD | EN  | M4)) /*GPIO_7*/\
  MUX_VAL(CP(SYS_BOOT6),		(IDIS | PTD | DIS | M4)) /*GPIO_8*/\
 							 /* - VIO_1V8*/\
  MUX_VAL(CP(SYS_OFF_MODE),	(IEN  | PTD | DIS | M0)) /*SYS_OFF_MODE*/\