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authorSekhar Nori <nsekhar@ti.com>2009-04-11 12:41:33 +0530
committerJustin Waters <justin.waters@timesys.com>2009-09-09 14:03:25 -0400
commitb64c159454b85f9424647678aadbd9e027c6a115 (patch)
tree767ca20c1cffc2bfe3a0e75bb50e3c4afdbc7776
parent65f3102824fa577e1fe206975f8dd635d8c3a2a4 (diff)
U-Boot: NAND: 4-bit ECC: Use CONFIG_NAND_CS macro for region selection
-rwxr-xr-xcpu/arm926ejs/da8xx/nand.c6
1 files changed, 4 insertions, 2 deletions
diff --git a/cpu/arm926ejs/da8xx/nand.c b/cpu/arm926ejs/da8xx/nand.c
index fa882e2b10..4e2d0c29e7 100755
--- a/cpu/arm926ejs/da8xx/nand.c
+++ b/cpu/arm926ejs/da8xx/nand.c
@@ -428,9 +428,10 @@ static struct nand_ecclayout nand_davinci_4bit_layout = {
static void nand_davinci_4bit_enable_hwecc(struct mtd_info *mtd, int mode)
{
- u32 val;
+ u32 val, region;
emifregs emif_addr;
emif_addr = (emifregs)DAVINCI_ASYNC_EMIF_CNTRL_BASE;
+ region = CONFIG_NAND_CS - 1;
switch (mode) {
case NAND_ECC_WRITE:
@@ -439,7 +440,8 @@ static void nand_davinci_4bit_enable_hwecc(struct mtd_info *mtd, int mode)
* Start a new ECC calculation for reading or writing 512 bytes
* of data.
*/
- val = (emif_addr->NANDFCR & ~(3 << 4)) | (1 << 12);
+ val = (emif_addr->NANDFCR & ~(3 << 4));
+ val |= (region << 4) | (1 << region) | (1 << 12);
emif_addr->NANDFCR = val;
break;
case NAND_ECC_READSYN: