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authorSudhakar Rajashekara <x0096290@linux-psp-server.(none)>2009-04-03 01:31:58 -0400
committerJustin Waters <justin.waters@timesys.com>2009-09-09 14:03:22 -0400
commit1261112de183709d975b346d85cd8b5854823153 (patch)
treedbc2e6b2415596f2d448385d93165b7ceb4f159f
parentd6292d79e4748444b44c3db12f8f45b29092592d (diff)
Use the CONFIG_NAND_CS option in the DA8xx configuration file to select the region to which NAND chip is connected.
Signed-off-by: Sudhakar Rajashekara <sudhakar.raj@ti.com>
-rw-r--r--cpu/arm926ejs/da8xx/nand.c6
-rw-r--r--include/asm-arm/arch-da8xx/nand_defs.h2
-rw-r--r--include/configs/da8xx_evm.h4
3 files changed, 5 insertions, 7 deletions
diff --git a/cpu/arm926ejs/da8xx/nand.c b/cpu/arm926ejs/da8xx/nand.c
index c3a309c1b2..396d209a72 100644
--- a/cpu/arm926ejs/da8xx/nand.c
+++ b/cpu/arm926ejs/da8xx/nand.c
@@ -121,7 +121,7 @@ static void nand_davinci_enable_hwecc(struct mtd_info *mtd, int mode)
{
emifregs emif_addr;
int dummy;
- int region = 2;
+ int region = CONFIG_NAND_CS;
emif_addr = (emifregs)DAVINCI_ASYNC_EMIF_CNTRL_BASE;
@@ -169,7 +169,7 @@ static int nand_davinci_calculate_ecc(struct mtd_info *mtd, const u_char *dat, u
n = (this->ecc.size/512);
- region = 1;
+ region = CONFIG_NAND_CS;
while (n--) {
tmp = nand_davinci_readecc(mtd, region);
*ecc_code++ = tmp;
@@ -178,7 +178,7 @@ static int nand_davinci_calculate_ecc(struct mtd_info *mtd, const u_char *dat, u
region++;
}
#else
- const int region = 2;
+ const int region = CONFIG_NAND_CS;
tmp = nand_davinci_readecc(mtd, region);
diff --git a/include/asm-arm/arch-da8xx/nand_defs.h b/include/asm-arm/arch-da8xx/nand_defs.h
index 450e8b986c..3a9a8c840a 100644
--- a/include/asm-arm/arch-da8xx/nand_defs.h
+++ b/include/asm-arm/arch-da8xx/nand_defs.h
@@ -29,12 +29,10 @@
#include <asm/arch/hardware.h>
#define MASK_CLE 0x10
-//#define MASK_ALE 0x0a
#define MASK_ALE 0x08
#define NAND_CE0CLE ((volatile u_int8_t *)(CONFIG_SYS_NAND_BASE + 0x10))
-//#define NAND_CE0ALE ((volatile u_int8_t *)(CFG_NAND_BASE + 0x0a))
#define NAND_CE0ALE ((volatile u_int8_t *)(CONFIG_SYS_NAND_BASE + 0x08))
#define NAND_CE0DATA ((volatile u_int8_t *)CONFIG_SYS_NAND_BASE)
diff --git a/include/configs/da8xx_evm.h b/include/configs/da8xx_evm.h
index 42f0a073c0..3947d4bdb6 100644
--- a/include/configs/da8xx_evm.h
+++ b/include/configs/da8xx_evm.h
@@ -29,7 +29,7 @@
/*=======*/
/* Board */
/*=======*/
-#define CFG_USE_SPIFLASH
+#define CFG_USE_SPIFLASH
#undef CONFIG_SYS_USE_NAND
#define CPU_TYPE cpu_is_da830() ? 1 : 0
@@ -118,7 +118,7 @@
#define CONFIG_ENV_IS_IN_NAND /* U-Boot env in NAND Flash */
#define CONFIG_ENV_SIZE SZ_128K
#define CONFIG_NAND_1BIT_ECC
-#define CONFIG_NAND_CS 3
+#define CONFIG_NAND_CS 2
#define CONFIG_SYS_NAND_BASE DAVINCI_ASYNC_EMIF_DATA_CE3_BASE
#define CONFIG_CLE_MASK 0x10
#define CONFIG_ALE_MASK 0x8