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| author | Daniel Schaeffer <daniel.schaeffer@timesys.com> | 2009-10-08 13:38:03 -0400 |
|---|---|---|
| committer | Daniel Schaeffer <daniel.schaeffer@timesys.com> | 2009-10-08 13:38:03 -0400 |
| commit | 17a76fb2bd80ebf1dc17801c0fd14009d128e977 (patch) | |
| tree | 42540e24424e31320e5a91d5b40c5cc0aca7fa40 | |
| parent | 0d01165105959ee63c492cfe0bb3acf903c611a8 (diff) | |
This patch originally from LogicPD OMAP35x Release 1.6.1 Original Patch Name: u-boot-2009.03-lv-som-10-word-bad-block-marker.patch
| -rw-r--r-- | drivers/mtd/nand/nand_util.c | 4 | ||||
| -rw-r--r-- | drivers/mtd/nand/omap_gpmc.c | 24 | ||||
| -rw-r--r-- | include/asm-arm/arch-omap3/omap_gpmc.h | 15 |
3 files changed, 12 insertions, 31 deletions
diff --git a/drivers/mtd/nand/nand_util.c b/drivers/mtd/nand/nand_util.c index 34b9755858..dc93d1f403 100644 --- a/drivers/mtd/nand/nand_util.c +++ b/drivers/mtd/nand/nand_util.c @@ -238,8 +238,8 @@ static struct nand_ecclayout yaffs_ecclayout = { static struct nand_ecclayout yaffs2_ecclayout = { .eccbytes = 12, .eccpos = { 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13}, - .oobfree = { { 1, 1}, { 14, 50} }, - .oobavail = 51, + .oobfree = { { 14, 50} }, + .oobavail = 50, }; #else /* ecclayout on chips that page_size = 2K, byte 0,1 is bad block marker */ diff --git a/drivers/mtd/nand/omap_gpmc.c b/drivers/mtd/nand/omap_gpmc.c index b60fa958f9..b746c4b375 100644 --- a/drivers/mtd/nand/omap_gpmc.c +++ b/drivers/mtd/nand/omap_gpmc.c @@ -301,16 +301,6 @@ void omap_nand_switch_ecc(int32_t hardware) * explanation */ -#ifdef CONFIG_OMAP3_LV_SOM -static uint8_t omap3_lv_som_scan_ff_pattern[] = { 0xff, 0xff }; -static struct nand_bbt_descr omap3_lv_som_largepage_memorybased = { - .options = 0, - .offs = 0, - .len = 1, /* to match LoLo, only first byte is looked at */ - .pattern = omap3_lv_som_scan_ff_pattern -}; -#endif - int board_nand_init(struct nand_chip *nand) { int32_t gpmc_config = 0; @@ -360,11 +350,17 @@ int board_nand_init(struct nand_chip *nand) nand->chip_delay = 100; /* Default ECC mode */ +#if 0 + nand->ecc.mode = NAND_ECC_HW; + nand->ecc.layout = &hw_nand_oob; + nand->ecc.size = 512; + nand->ecc.bytes = 3; + nand->ecc.hwctl = omap_enable_hwecc; + nand->ecc.correct = omap_correct_data; + nand->ecc.calculate = omap_calculate_ecc; + omap_hwecc_init(nand); +#else nand->ecc.mode = NAND_ECC_SOFT; - -#ifdef CONFIG_OMAP3_LV_SOM - /* Use our specific bad-block definition (first byte only) */ - nand->badblock_pattern = &omap3_lv_som_largepage_memorybased; #endif return 0; diff --git a/include/asm-arm/arch-omap3/omap_gpmc.h b/include/asm-arm/arch-omap3/omap_gpmc.h index 601f4b45ad..bd22bce837 100644 --- a/include/asm-arm/arch-omap3/omap_gpmc.h +++ b/include/asm-arm/arch-omap3/omap_gpmc.h @@ -48,29 +48,14 @@ /* Large Page x16 NAND device Layout */ #ifdef GPMC_NAND_ECC_LP_x16_LAYOUT -#ifdef CONFIG_OMAP3_LV_SOM -/* OMAP3_LV_SOM only uses first byte for bad block marker, not first - half-word */ #define GPMC_NAND_HW_ECC_LAYOUT {\ .eccbytes = 12,\ .eccpos = {2, 3, 4, 5, 6, 7, 8, 9,\ 10, 11, 12, 13},\ .oobfree = {\ - {.offset = 1,\ - .length = 1 }, \ {.offset = 14,\ .length = 50 } } \ } -#else -#define GPMC_NAND_HW_ECC_LAYOUT {\ - .eccbytes = 12,\ - .eccpos = {2, 3, 4, 5, 6, 7, 8, 9,\ - 10, 11, 12, 13},\ - .oobfree = {\ - {.offset = 14,\ - .length = 50 } } \ -} -#endif #endif /* Small Page x8 NAND device Layout */ |