diff options
| author | Jason Jin <Jason.jin@freescale.com> | 2007-10-29 19:26:21 +0800 |
|---|---|---|
| committer | Wolfgang Denk <wd@denx.de> | 2007-11-17 00:57:51 +0100 |
| commit | db74b3c1c9481a6bffbf8cd445e5bcbf6908e836 (patch) | |
| tree | 5406edd66d9277294c88a52c3cd731ca92890ca6 | |
| parent | ee1f5e3bfe2e52e1d8795ccce0acd7927536f6f5 (diff) | |
Unify pixis_reset altbank across board families
Basically, refactor the CFG_PIXIS_VBOOT_MASK values
into the separate board config files.
Signed-off-by: Jason Jin <Jason.jin@freescale.com>
Signed-off-by: Jon Loeliger <jdl@freescale.com>
| -rw-r--r-- | board/freescale/common/pixis.c | 5 | ||||
| -rw-r--r-- | include/configs/MPC8544DS.h | 1 | ||||
| -rw-r--r-- | include/configs/MPC8641HPCN.h | 1 |
3 files changed, 6 insertions, 1 deletions
diff --git a/board/freescale/common/pixis.c b/board/freescale/common/pixis.c index fd99a938c0..45dcf4dab0 100644 --- a/board/freescale/common/pixis.c +++ b/board/freescale/common/pixis.c @@ -207,13 +207,16 @@ void read_from_px_regs_altbank(int set) out8(PIXIS_BASE + PIXIS_VCFGEN1, tmp); } +#ifndef CFG_PIXIS_VBOOT_MASK +#define CFG_PIXIS_VBOOT_MASK 0x40 +#endif void set_altbank(void) { u8 tmp; tmp = in8(PIXIS_BASE + PIXIS_VBOOT); - tmp ^= 0x40; + tmp ^= CFG_PIXIS_VBOOT_MASK; out8(PIXIS_BASE + PIXIS_VBOOT, tmp); } diff --git a/include/configs/MPC8544DS.h b/include/configs/MPC8544DS.h index f580ccadee..13e2a2c079 100644 --- a/include/configs/MPC8544DS.h +++ b/include/configs/MPC8544DS.h @@ -198,6 +198,7 @@ extern unsigned long get_board_sys_clk(unsigned long dummy); #define PIXIS_VSPEED1 0x18 /* VELA VSpeed 1 */ #define PIXIS_VCLKH 0x19 /* VELA VCLKH register */ #define PIXIS_VCLKL 0x1A /* VELA VCLKL register */ +#define CFG_PIXIS_VBOOT_MASK 0x40 /* Reset altbank mask*/ /* define to use L1 as initial stack */ diff --git a/include/configs/MPC8641HPCN.h b/include/configs/MPC8641HPCN.h index aa6dbc47ad..6f87240263 100644 --- a/include/configs/MPC8641HPCN.h +++ b/include/configs/MPC8641HPCN.h @@ -201,6 +201,7 @@ extern unsigned long get_board_sys_clk(unsigned long dummy); #define PIXIS_VSPEED1 0x18 /* VELA VSpeed 1 */ #define PIXIS_VCLKH 0x19 /* VELA VCLKH register */ #define PIXIS_VCLKL 0x1A /* VELA VCLKL register */ +#define CFG_PIXIS_VBOOT_MASK 0x40 /* Reset altbank mask*/ #define CFG_MAX_FLASH_BANKS 2 /* number of banks */ #define CFG_MAX_FLASH_SECT 128 /* sectors per device */ |