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| author | Scott Sweeny <scott.sweeny@timesys.com> | 2009-04-30 10:11:50 -0400 |
|---|---|---|
| committer | Scott Sweeny <scott.sweeny@timesys.com> | 2009-04-30 10:11:50 -0400 |
| commit | f0909a739463f4aa949d25a5c461f7fb423a1d89 (patch) | |
| tree | 70b1697f31e94a295766c0c2bfce5441aa0e22e2 | |
| parent | b6c39f94620be65cdfd9f22a939ef99031834936 (diff) | |
Add Compact Flash support for OMAP3430LV SOM
This patch originally from LogicPD OMAP35x Release 1.5.0
Original Patch Name: u-boot-1.1.4-omap3430-lv-som-17-cf.patch
| -rw-r--r-- | board/omap3430lv_som/mem.c | 22 | ||||
| -rw-r--r-- | include/asm-arm/arch-omap3/mem.h | 9 |
2 files changed, 30 insertions, 1 deletions
diff --git a/board/omap3430lv_som/mem.c b/board/omap3430lv_som/mem.c index b13ebffa59..1a9d03c91e 100644 --- a/board/omap3430lv_som/mem.c +++ b/board/omap3430lv_som/mem.c @@ -114,6 +114,18 @@ static u32 gpmc_m_nand[GPMC_MAX_REG] = { M_NAND_GPMC_CONFIG6, 0 }; +#if 1 +// Compact Flash setup +static u32 gpmc_m_cf[GPMC_MAX_REG] = { + M_CF_GPMC_CONFIG1, + M_CF_GPMC_CONFIG2, + M_CF_GPMC_CONFIG3, + M_CF_GPMC_CONFIG4, + M_CF_GPMC_CONFIG5, + M_CF_GPMC_CONFIG6, 0 +}; +#endif + /********** Functions ****/ /* ENV Functions */ @@ -408,9 +420,17 @@ void gpmc_init(void) f_sec = SZ_128K; NOR_MAX_FLASH_BANKS = 2; size = PISMO1_NOR_SIZE; - for(i=0; i < NOR_MAX_FLASH_BANKS; i++) + for(i=0; i < NOR_MAX_FLASH_BANKS; i++) { NOR_FLASH_BANKS_LIST[i] = FLASH_BASE_SDPV1 + PHYS_FLASH_SIZE*i; } #endif + +#if 1 + /* CS 3 (CompactFlash)*/ + gpmc_config = gpmc_m_cf; + gpmc_base = GPMC_CONFIG_CS0 + (3 * GPMC_CONFIG_WIDTH); + enable_gpmc_config(gpmc_config, gpmc_base, 0x18000000, GPMC_SIZE_16M); +#endif + } diff --git a/include/asm-arm/arch-omap3/mem.h b/include/asm-arm/arch-omap3/mem.h index 6d5dc108f1..cfd093ae11 100644 --- a/include/asm-arm/arch-omap3/mem.h +++ b/include/asm-arm/arch-omap3/mem.h @@ -333,6 +333,15 @@ typedef enum { # define LAB_ENET_GPMC_CONFIG5 0x041D1F1F # define LAB_ENET_GPMC_CONFIG6 0x1D0904C4 +// ComactFlash timing on CS3 +# define M_CF_GPMC_CONFIG1 0x00001210 +# define M_CF_GPMC_CONFIG2 0x00131000 +# define M_CF_GPMC_CONFIG3 0x001f1f01 +# define M_CF_GPMC_CONFIG4 0x10030e03 +# define M_CF_GPMC_CONFIG5 0x010f1411 +# define M_CF_GPMC_CONFIG6 0x80030600 + + # define P2_GPMC_CONFIG1 0x0 # define P2_GPMC_CONFIG2 0x0 # define P2_GPMC_CONFIG3 0x0 |