From 49e38908678f863728eda82ca64fd4acaaed9685 Mon Sep 17 00:00:00 2001 From: Rafael Beims Date: Mon, 13 Jun 2022 14:05:22 -0300 Subject: ARM: dts: imx7d-colibri: Move usdhc1-cd-slp definition to iomuxc_lpsr The usdhc1-cd-slp-grp node in the device tree is making use of PAD_LPSR definitions and these definitions are not compatible with the iomuxc node. Because of that, instead of setting up GPIO1_IO00 this group is setting up the registers for GPIO1_IO15. Moving the group to the iomuxc_lpsr node makes the setup for the correct pin and also makes GPIO1_IO15 available again as a standard GPIO. Relates-to: ELB-4525 Signed-off-by: Rafael Beims --- arch/arm/boot/dts/imx7-colibri.dtsi | 12 +++++++----- 1 file changed, 7 insertions(+), 5 deletions(-) diff --git a/arch/arm/boot/dts/imx7-colibri.dtsi b/arch/arm/boot/dts/imx7-colibri.dtsi index a0ea6334a7a2..5b9339bb1e9f 100644 --- a/arch/arm/boot/dts/imx7-colibri.dtsi +++ b/arch/arm/boot/dts/imx7-colibri.dtsi @@ -1166,11 +1166,6 @@ >; }; - pinctrl_cd_usdhc1_sleep: usdhc1-cd-slp-grp { - fsl,pins = < - MX7D_PAD_LPSR_GPIO1_IO00__GPIO1_IO0 0x0 /* CD */ - >; - }; }; &iomuxc_lpsr { @@ -1216,4 +1211,11 @@ MX7D_PAD_LPSR_GPIO1_IO06__GPIO1_IO6 0x14 /* RI */ >; }; + + pinctrl_cd_usdhc1_sleep: usdhc1-cd-slp-grp { + fsl,pins = < + MX7D_PAD_LPSR_GPIO1_IO00__GPIO1_IO0 0x0 /* CD */ + >; + }; + }; -- cgit v1.2.3