From 399758c48f7680e0e80f67a2ad49207f51cb41dd Mon Sep 17 00:00:00 2001 From: Max Krummenacher Date: Wed, 13 Jan 2021 19:39:15 +0100 Subject: tty: serial: fsl_lpuart: fix uart baud divider overflow For low baudrates the uart baudrate divider can overflow, i.e. the sbr register must stay within [1..8191]. With an input frequency of 80MHz and a baudrate of 1200 the following register settings are calculated. sbr: 16666, osr: 4 Fix this. Related-to: ELB-3517 Signed-off-by: Max Krummenacher --- drivers/tty/serial/fsl_lpuart.c | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/drivers/tty/serial/fsl_lpuart.c b/drivers/tty/serial/fsl_lpuart.c index b822e54f2d13..f460ac06ffa5 100644 --- a/drivers/tty/serial/fsl_lpuart.c +++ b/drivers/tty/serial/fsl_lpuart.c @@ -2159,10 +2159,15 @@ lpuart32_serial_setbrg(struct lpuart_port *sport, unsigned int baudrate) sbr = 0; for (tmp_osr = 4; tmp_osr <= 32; tmp_osr++) { - /* calculate the temporary sbr value */ + /* + * calculate the temporary sbr value, sbr must be in 1..8191, + * limit to 8190, as the loop checks for sbr and sbr + 1 + */ tmp_sbr = (clk / (baudrate * tmp_osr)); if (tmp_sbr == 0) tmp_sbr = 1; + if (tmp_sbr > 8190) + tmp_sbr = 8190; /* * calculate the baud rate difference based on the temporary -- cgit v1.2.3