1 files changed, 153 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/freescale/imx8mn-ddr3l-evk-rpmsg.dts b/arch/arm64/boot/dts/freescale/imx8mn-ddr3l-evk-rpmsg.dts
new file mode 100644
index 000000000000..36dd6bd7042e
--- /dev/null
+++ b/arch/arm64/boot/dts/freescale/imx8mn-ddr3l-evk-rpmsg.dts
@@ -0,0 +1,153 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright 2020 NXP
+ */
+
+#include "imx8mn-ddr3l-evk.dts"
+
+/ {
+	reserved-memory {
+		#address-cells = <2>;
+		#size-cells = <2>;
+		ranges;
+
+		m_core_reserved: m_core@0x80000000 {
+			no-map;
+			reg = <0 0x80000000 0 0x1000000>;
+		};
+
+		vdev0vring0: vdev0vring0@b8000000 {
+			compatible = "shared-dma-pool";
+			reg = <0 0xb8000000 0 0x8000>;
+			no-map;
+		};
+
+		vdev0vring1: vdev0vring1@b8008000 {
+			compatible = "shared-dma-pool";
+			reg = <0 0xb8008000 0 0x8000>;
+			no-map;
+		};
+		vdevbuffer: vdevbuffer@b8400000 {
+			compatible = "shared-dma-pool";
+			reg = <0 0xb8400000 0 0x100000>;
+			no-map;
+		};
+
+		/*
+		 * The following three is just a workaround
+		 * to avoid Linux use the memory.
+		 * This board only has 1GB memory, the 0xb8000000
+		 * exceeds the DRAM, and round back to 0x78000000,
+		 * since we not modify Mcore image, so we need to avoid
+		 * Linux touch 0x78000000 and mark Mcore ddr demo broken.
+		 */
+		vdev0vring0@78000000 {
+			reg = <0 0x78000000 0 0x8000>;
+			no-map;
+		};
+
+		vdev0vring1@78008000 {
+			reg = <0 0x78008000 0 0x8000>;
+			no-map;
+		};
+
+		rsc-table {
+			reg = <0 0x780ff000 0 0x1000>;
+			no-map;
+		};
+
+		vdevbuffer@78400000 {
+			reg = <0 0x78400000 0 0x100000>;
+			no-map;
+		};
+	};
+
+	sound-wm8524 {
+		status = "disabled";
+	};
+
+	wm8524: wm8524{
+		status = "disabled";
+	};
+
+	rpmsg_i2s: rpmsg-i2s {
+		compatible = "fsl,imx8mn-rpmsg-i2s";
+		/* the audio device index in m4 domain */
+		fsl,audioindex = <0> ;
+		fsl,dma-buffer-size = <0x6000000>;
+		fsl,enable-lpa;
+		status = "okay";
+	};
+
+	sound-rpmsg {
+		compatible = "fsl,imx-audio-rpmsg";
+		model = "wm8524-audio";
+		cpu-dai = <&rpmsg_i2s>;
+		rpmsg-out;
+	};
+
+	imx8mn-cm7 {
+		compatible = "fsl,imx8mn-cm7";
+		rsc-da = <0xb8000000>;
+		mbox-names = "tx", "rx", "rxdb";
+		mboxes = <&mu 0 1
+			  &mu 1 1
+			  &mu 3 1>;
+		memory-region = <&vdev0vring0>, <&vdev0vring1>, <&vdevbuffer>;
+		status = "okay";
+	};
+};
+
+&clk {
+	init-on-array = <
+	IMX8MN_CLK_UART4_ROOT
+	>;
+};
+
+/*
+ * ATTENTION: M core may use IPs like below
+ * ECSPI2, GPIO1/GPIO5, GPT1, I2C3, I2S3, UART4, PWM3, SDMA1/3 and PDM
+ */
+
+&ecspi2 {
+	status = "disabled";
+};
+
+&flexspi {
+	status = "disabled";
+};
+
+&i2c3 {
+	status = "disabled";
+};
+
+&pwm3 {
+	status = "disabled";
+};
+
+&rpmsg{
+	/*
+	 * 64K for one rpmsg instance:
+	 * --0xb8000000~0xb800ffff: pingpong
+	 */
+	vdev-nums = <1>;
+	reg = <0x0 0xb8000000 0x0 0x10000>;
+	memory-region = <&vdevbuffer>;
+	status = "disabled";
+};
+
+&sai3 {
+	status = "disabled";
+};
+
+&uart4 {
+	status = "disabled";
+};
+
+&sdma1{
+	status = "disabled";
+};
+
+&sdma3 {
+	status = "disabled";
+};