1 files changed, 70 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/freescale/fsl-imx8qm-lpddr4-arm2-hdmi-in.dts b/arch/arm64/boot/dts/freescale/fsl-imx8qm-lpddr4-arm2-hdmi-in.dts
new file mode 100644
index 000000000000..2f60845773c2
--- /dev/null
+++ b/arch/arm64/boot/dts/freescale/fsl-imx8qm-lpddr4-arm2-hdmi-in.dts
@@ -0,0 +1,70 @@
+/*
+ * Copyright 2018 NXP
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+/*
+ * HDMI only dts, disable ldb display.
+ */
+
+#include "fsl-imx8qm-lpddr4-arm2-hdmi.dts"
+
+/ {
+	sound-hdmi-rx {
+		compatible = "fsl,imx-audio-cdnhdmi";
+		model = "imx-audio-hdmi-rx";
+		audio-cpu = <&sai_hdmi_rx>;
+		protocol = <1>;
+		hdmi-in;
+	};
+};
+
+/* HDMI RX */
+&isi_0 {
+	status = "disabled";
+};
+
+&isi_1 {
+	interface = <4 0 2>;  /* <Input MIPI_VCx Output>
+						Input:  0-DC0, 1-DC1, 2-MIPI CSI0, 3-MIPI CSI1, 4-HDMI, 5-MEM
+						VCx:    0-VC0, 1-VC1, 2-VC2, 3-VC3, MIPI CSI only
+						Output: 0-DC0, 1-DC1, 2-MEM */
+	status = "okay";
+};
+
+&isi_2 {
+	status = "okay";
+	fsl,chain_buf;
+};
+
+&isi_3 {
+	status = "disabled";
+};
+
+
+&mipi_csi_0 {
+	status = "disabled";
+};
+
+&i2c0_mipi_csi0 {
+	status = "disabled";
+};
+
+&hdmi_rx {
+	fsl,cec;
+	assigned-clocks = <&clk IMX8QM_HDMI_RX_HD_REF_SEL>,
+						<&clk IMX8QM_HDMI_RX_PXL_SEL>,
+						<&clk IMX8QM_HDMI_RX_HD_REF_DIV>;
+	assigned-clock-parents = <&clk IMX8QM_HDMI_RX_DIG_PLL_CLK>,
+							<&clk IMX8QM_HDMI_RX_BYPASS_CLK>;
+	assigned-clock-rates = <0>, <0>, <400000000>;
+	status = "okay";
+};