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| author | Otavio Salvador <otavio@ossystems.com.br> | 2022-05-19 11:02:10 -0300 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2022-05-19 11:02:10 -0300 |
| commit | b7007e1d615b8d4b71c28ebf790c5164fc4491d5 (patch) | |
| tree | 48c35f63dc1101d0d528b5d79c81849b99ca7c6d /drivers/parisc/gsc.c | |
| parent | 38955ef654554c94f4d91bafb9ef5c5f41a4c0f6 (diff) | |
| parent | 0e61b511dd8474280ba674590daa55f30433b7d4 (diff) | |
Merge pull request #565 from philschenker/update-to-5.4.193__update-to-2.3.7__5.4-2.3.x-imx
Update Patchlevel on Branch 5.4-2.3.x-imx from 5.4.161->5.4.193
Diffstat (limited to 'drivers/parisc/gsc.c')
| -rw-r--r-- | drivers/parisc/gsc.c | 31 |
1 files changed, 31 insertions, 0 deletions
diff --git a/drivers/parisc/gsc.c b/drivers/parisc/gsc.c index ed9371acf37e..ec175ae99873 100644 --- a/drivers/parisc/gsc.c +++ b/drivers/parisc/gsc.c @@ -135,10 +135,41 @@ static void gsc_asic_unmask_irq(struct irq_data *d) */ } +#ifdef CONFIG_SMP +static int gsc_set_affinity_irq(struct irq_data *d, const struct cpumask *dest, + bool force) +{ + struct gsc_asic *gsc_dev = irq_data_get_irq_chip_data(d); + struct cpumask tmask; + int cpu_irq; + + if (!cpumask_and(&tmask, dest, cpu_online_mask)) + return -EINVAL; + + cpu_irq = cpu_check_affinity(d, &tmask); + if (cpu_irq < 0) + return cpu_irq; + + gsc_dev->gsc_irq.txn_addr = txn_affinity_addr(d->irq, cpu_irq); + gsc_dev->eim = ((u32) gsc_dev->gsc_irq.txn_addr) | gsc_dev->gsc_irq.txn_data; + + /* switch IRQ's for devices below LASI/WAX to other CPU */ + gsc_writel(gsc_dev->eim, gsc_dev->hpa + OFFSET_IAR); + + irq_data_update_effective_affinity(d, &tmask); + + return IRQ_SET_MASK_OK; +} +#endif + + static struct irq_chip gsc_asic_interrupt_type = { .name = "GSC-ASIC", .irq_unmask = gsc_asic_unmask_irq, .irq_mask = gsc_asic_mask_irq, +#ifdef CONFIG_SMP + .irq_set_affinity = gsc_set_affinity_irq, +#endif }; int gsc_assign_irq(struct irq_chip *type, void *data) |