diff options
author | Stefan Agner <stefan.agner@toradex.com> | 2018-01-31 17:40:08 +0100 |
---|---|---|
committer | Stefan Agner <stefan.agner@toradex.com> | 2018-01-31 17:57:15 +0100 |
commit | 5410d1ab5b8382ac67423d129d1744a337de47dc (patch) | |
tree | cc578e745f93270d6159d66f2a4e6bf8638cfdc6 | |
parent | acc1f6790a86f38398da46bc30908c8e8e2c0757 (diff) |
apalis-imx8qm: migrate device tree to beta2
Enabled new nodes crucial for graphics.
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
-rw-r--r-- | arch/arm64/boot/dts/freescale/fsl-imx8qm-apalis.dts | 130 |
1 files changed, 128 insertions, 2 deletions
diff --git a/arch/arm64/boot/dts/freescale/fsl-imx8qm-apalis.dts b/arch/arm64/boot/dts/freescale/fsl-imx8qm-apalis.dts index f9f2afd55afb..051339ceddad 100644 --- a/arch/arm64/boot/dts/freescale/fsl-imx8qm-apalis.dts +++ b/arch/arm64/boot/dts/freescale/fsl-imx8qm-apalis.dts @@ -627,10 +627,130 @@ status = "okay"; }; +&prg1 { + status = "okay"; +}; + +&prg2 { + status = "okay"; +}; + +&prg3 { + status = "okay"; +}; + +&prg4 { + status = "okay"; +}; + +&prg5 { + status = "okay"; +}; + +&prg6 { + status = "okay"; +}; + +&prg7 { + status = "okay"; +}; + +&prg8 { + status = "okay"; +}; + +&prg9 { + status = "okay"; +}; + +&dpr1_channel1 { + status = "okay"; +}; + +&dpr1_channel2 { + status = "okay"; +}; + +&dpr1_channel3 { + status = "okay"; +}; + +&dpr2_channel1 { + status = "okay"; +}; + +&dpr2_channel2 { + status = "okay"; +}; + +&dpr2_channel3 { + status = "okay"; +}; + &dpu1 { status = "okay"; }; +&prg10 { + status = "okay"; +}; + +&prg11 { + status = "okay"; +}; + +&prg12 { + status = "okay"; +}; + +&prg13 { + status = "okay"; +}; + +&prg14 { + status = "okay"; +}; + +&prg15 { + status = "okay"; +}; + +&prg16 { + status = "okay"; +}; + +&prg17 { + status = "okay"; +}; + +&prg18 { + status = "okay"; +}; + +&dpr3_channel1 { + status = "okay"; +}; + +&dpr3_channel2 { + status = "okay"; +}; + +&dpr3_channel3 { + status = "okay"; +}; + +&dpr4_channel1 { + status = "okay"; +}; + +&dpr4_channel2 { + status = "okay"; +}; + +&dpr4_channel3 { + status = "okay"; +}; + &dpu2 { status = "okay"; }; @@ -643,9 +763,10 @@ clocks = <&clk IMX8QM_HSIO_PCIE_A_MSTR_AXI_CLK>, <&clk IMX8QM_HSIO_PCIE_A_SLV_AXI_CLK>, <&clk IMX8QM_HSIO_PHY_X2_PCLK_0>, + <&clk IMX8QM_HSIO_PCIE_X2_PER_CLK>, <&clk IMX8QM_HSIO_PCIE_A_DBI_AXI_CLK>, <&pcie_sata_refclk_gate>; - clock-names = "pcie", "pcie_bus", "pcie_phy", "pcie_inbound_axi", "pcie_ext"; + clock-names = "pcie", "pcie_bus", "pcie_phy", "pcie_per", "pcie_inbound_axi", "pcie_ext"; reset-gpio = <&gpio3 26 GPIO_ACTIVE_HIGH>; status = "okay"; @@ -659,9 +780,10 @@ clocks = <&clk IMX8QM_HSIO_PCIE_B_MSTR_AXI_CLK>, <&clk IMX8QM_HSIO_PCIE_B_SLV_AXI_CLK>, <&clk IMX8QM_HSIO_PHY_X2_PCLK_1>, + <&clk IMX8QM_HSIO_PCIE_X1_PER_CLK>, <&clk IMX8QM_HSIO_PCIE_B_DBI_AXI_CLK>, <&pcie_sata_refclk_gate>; - clock-names = "pcie", "pcie_bus", "pcie_phy", "pcie_inbound_axi", "pcie_ext"; + clock-names = "pcie", "pcie_bus", "pcie_phy", "pcie_per", "pcie_inbound_axi", "pcie_ext"; reset-gpio = <&gpio5 0 GPIO_ACTIVE_HIGH>; /*clkreq-gpio = <&gpio4 30 GPIO_ACTIVE_LOW>;*/ @@ -673,6 +795,10 @@ status = "okay"; }; +&pd_dma_lpuart1 { + debug_console; +}; + &rpmsg{ /* * 64K for one rpmsg instance: |