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author | Max Krummenacher <max.krummenacher@toradex.com> | 2020-11-25 22:12:24 +0100 |
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committer | Max Krummenacher <max.krummenacher@toradex.com> | 2020-11-26 13:51:59 +0000 |
commit | c865e58fe9e1e2d01ff27f85723b119ce003c942 (patch) | |
tree | 15485bc66ce560d9c6549318d324b22a4999cd35 | |
parent | 3d63f3493ac677bc890a1f56d02b1b5facb1ca73 (diff) |
arm64: dts: imx8mp-verdin: add ext_osc to pcie_phy and prevent warning
The pcie_phy uses ext_osc info in addition to the pcie node.
While at it add the bus-range property to prevent:
No bus range found for /pcie@33800000, using [bus 00-ff]
Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
-rwxr-xr-x | arch/arm64/boot/dts/freescale/imx8mp-verdin.dtsi | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/freescale/imx8mp-verdin.dtsi b/arch/arm64/boot/dts/freescale/imx8mp-verdin.dtsi index 65009364d6f1..8982867a2633 100755 --- a/arch/arm64/boot/dts/freescale/imx8mp-verdin.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mp-verdin.dtsi @@ -525,6 +525,7 @@ /* Verdin PCIE_1 */ &pcie { + bus-range = <0x00 0xff>; clocks = <&clk IMX8MP_CLK_HSIO_AXI_DIV>, <&clk IMX8MP_CLK_PCIE_AUX>, <&clk IMX8MP_CLK_PCIE_PHY>, @@ -542,6 +543,10 @@ reset-gpio = <&gpio4 19 GPIO_ACTIVE_LOW>; }; +&pcie_phy { + ext_osc = <0>; +}; + /* Verdin PWM_1 */ &pwm1 { pinctrl-names = "default"; |