diff options
author | Graziano Misuraca <gmisuraca@nvidia.com> | 2012-06-06 16:22:51 -0700 |
---|---|---|
committer | Ryan Wong <ryanw@nvidia.com> | 2012-06-14 17:25:49 -0700 |
commit | b96a17ea7e143a045d6ad0fbbc75368d90d4cc12 (patch) | |
tree | 1b9c3ae95da60c7b1f0cc2a714968c6b23945de0 | |
parent | 64655badec17cea1c3ad43a5fff4ed92ad862aed (diff) |
ARM: Tegra: cardhu: Change pin for LVDS_SHTDN_N on PM313
Change pin used for LVDS_SHTDN_N from GMI_AD9 to VI_D4
Bug 958167
Change-Id: I19804126df1616860c5d177f971f4c1658651ee5
Signed-off-by: Graziano Misuraca <gmisuraca@nvidia.com>
Reviewed-on: http://git-master/r/108612
Reviewed-by: Ryan Wong <ryanw@nvidia.com>
-rw-r--r-- | arch/arm/mach-tegra/board-cardhu-panel.c | 2 | ||||
-rw-r--r-- | arch/arm/mach-tegra/board-cardhu-pinmux.c | 6 |
2 files changed, 2 insertions, 6 deletions
diff --git a/arch/arm/mach-tegra/board-cardhu-panel.c b/arch/arm/mach-tegra/board-cardhu-panel.c index a3e5047fcd53..aa48ab3273de 100644 --- a/arch/arm/mach-tegra/board-cardhu-panel.c +++ b/arch/arm/mach-tegra/board-cardhu-panel.c @@ -58,7 +58,7 @@ #define pm313_MODE0 TEGRA_GPIO_PZ4 #define pm313_MODE1 TEGRA_GPIO_PW1 #define pm313_BPP TEGRA_GPIO_PN6 /* 0:24bpp, 1:18bpp */ -#define pm313_lvds_shutdown TEGRA_GPIO_PH1 +#define pm313_lvds_shutdown TEGRA_GPIO_PL2 /* E1247 reworked for pm269 pins */ #define e1247_pm269_lvds_shutdown TEGRA_GPIO_PN6 diff --git a/arch/arm/mach-tegra/board-cardhu-pinmux.c b/arch/arm/mach-tegra/board-cardhu-pinmux.c index fd0a6ae34ffc..4672e71a339e 100644 --- a/arch/arm/mach-tegra/board-cardhu-pinmux.c +++ b/arch/arm/mach-tegra/board-cardhu-pinmux.c @@ -1,7 +1,7 @@ /* * arch/arm/mach-tegra/board-cardhu-pinmux.c * - * Copyright (C) 2011 NVIDIA Corporation + * Copyright (C) 2011-2012, NVIDIA Corporation * * This software is licensed under the terms of the GNU General Public * License version 2, as published by the Free Software Foundation, and @@ -511,7 +511,6 @@ static __initdata struct tegra_pingroup_config unused_pins_lowpower[] = { DEFAULT_PINMUX(GMI_AD5, NAND, NORMAL, TRISTATE, OUTPUT), DEFAULT_PINMUX(GMI_AD6, NAND, NORMAL, TRISTATE, OUTPUT), DEFAULT_PINMUX(GMI_AD7, NAND, NORMAL, TRISTATE, OUTPUT), - DEFAULT_PINMUX(GMI_AD9, PWM1, NORMAL, NORMAL, OUTPUT), DEFAULT_PINMUX(GMI_AD11, NAND, NORMAL, NORMAL, OUTPUT), DEFAULT_PINMUX(GMI_AD13, NAND, PULL_UP, NORMAL, INPUT), DEFAULT_PINMUX(GMI_WR_N, NAND, NORMAL, TRISTATE, OUTPUT), @@ -529,7 +528,6 @@ static __initdata struct tegra_pingroup_config gmi_pins_269[] = { DEFAULT_PINMUX(GMI_CS6_N, SATA, NORMAL, TRISTATE, OUTPUT), DEFAULT_PINMUX(GMI_CS7_N, NAND, PULL_UP, NORMAL, INPUT), DEFAULT_PINMUX(GMI_AD8, PWM0, NORMAL, NORMAL, OUTPUT), - DEFAULT_PINMUX(GMI_AD9, PWM1, NORMAL, NORMAL, OUTPUT), DEFAULT_PINMUX(GMI_AD10, NAND, NORMAL, NORMAL, OUTPUT), DEFAULT_PINMUX(GMI_AD11, NAND, NORMAL, NORMAL, OUTPUT), DEFAULT_PINMUX(GMI_AD13, NAND, PULL_UP, TRISTATE, OUTPUT), @@ -703,7 +701,6 @@ struct gpio_init_pin_info pin_lpm_cardhu_common[] = { /* E1198 without PM313 display board */ struct gpio_init_pin_info pin_lpm_cardhu_common_wo_pm313[] = { - PIN_GPIO_LPM("GMI_AD9", TEGRA_GPIO_PH1, 0, 0), PIN_GPIO_LPM("GMI_AD11", TEGRA_GPIO_PH3, 0, 0), }; @@ -723,7 +720,6 @@ struct gpio_init_pin_info vddio_gmi_pins_pm269[] = { /* PM269 without PM313 display board */ struct gpio_init_pin_info vddio_gmi_pins_pm269_wo_pm313[] = { PIN_GPIO_LPM("GMI_CS2", TEGRA_GPIO_PK3, 1, 0), - PIN_GPIO_LPM("GMI_AD9", TEGRA_GPIO_PH1, 0, 0), }; static void set_unused_pin_gpio(struct gpio_init_pin_info *lpm_pin_info, |