diff options
author | Bo Yan <byan@nvidia.com> | 2013-09-12 23:21:56 -0700 |
---|---|---|
committer | Harry Hong <hhong@nvidia.com> | 2013-11-20 18:26:59 -0800 |
commit | a6feb6303141c8fe467582fae8cdd5d003400841 (patch) | |
tree | 09e17feff41f3d4a65ae94865385322c24ba0b73 | |
parent | 2900733bb42bef3c36b427ff81076e6c992cb1a7 (diff) |
ARM: tegra: always enable RAM repair for all chips
RAM repair sequence must be done even if no RAM is actually repaired.
bug 1366617
Change-Id: Ibaabf1355310aeea01b5a9e247ce99625dc31a3e
Signed-off-by: Bo Yan <byan@nvidia.com>
Reviewed-on: http://git-master/r/323997
Reviewed-by: Harry Hong <hhong@nvidia.com>
Tested-by: Harry Hong <hhong@nvidia.com>
-rw-r--r-- | arch/arm/mach-tegra/common.c | 10 |
1 files changed, 4 insertions, 6 deletions
diff --git a/arch/arm/mach-tegra/common.c b/arch/arm/mach-tegra/common.c index 0048ca3f6a9e..916693fddea6 100644 --- a/arch/arm/mach-tegra/common.c +++ b/arch/arm/mach-tegra/common.c @@ -588,12 +588,10 @@ static void __init tegra_perf_init(void) #ifdef CONFIG_ARCH_TEGRA_11x_SOC static void __init tegra_ramrepair_init(void) { - if (tegra_spare_fuse(10) | tegra_spare_fuse(11)) { - u32 reg; - reg = readl(FLOW_CTRL_RAM_REPAIR); - reg &= ~FLOW_CTRL_RAM_REPAIR_BYPASS_EN; - writel(reg, FLOW_CTRL_RAM_REPAIR); - } + u32 reg; + reg = readl(FLOW_CTRL_RAM_REPAIR); + reg &= ~FLOW_CTRL_RAM_REPAIR_BYPASS_EN; + writel(reg, FLOW_CTRL_RAM_REPAIR); } #endif |