From 0af559a833e9cb1be1e1295d00e22ecab1d3f5be Mon Sep 17 00:00:00 2001 From: Sandrine Bailleux Date: Fri, 8 Jul 2016 14:38:16 +0100 Subject: ARM platforms: Add support for SEPARATE_CODE_AND_RODATA The arm_setup_page_tables() function used to expect a single set of addresses defining the extents of the whole read-only section, code and read-only data mixed up, which was mapped as executable. This patch changes this behaviour. arm_setup_page_tables() now expects 2 separate sets of addresses: - the extents of the code section; - the extents of the read-only data section. The code is mapped as executable, whereas the data is mapped as execute-never. New #defines have been introduced to identify the extents of the code and the read-only data section. Given that all BL images except BL1 share the same memory layout and linker script structure, these #defines are common across these images. The slight memory layout differences in BL1 have been handled by providing values specific to BL1. Note that this patch also affects the Xilinx platform port, which uses the arm_setup_page_tables() function. It has been updated accordingly, such that the memory mappings on this platform are unchanged. This is achieved by passing null values as the extents of the read-only data section so that it is ignored. As a result, the whole read-only section is still mapped as executable. Fixes ARM-software/tf-issues#85 Change-Id: I1f95865c53ce6e253a01286ff56e0aa1161abac5 --- plat/xilinx/zynqmp/bl31_zynqmp_setup.c | 2 ++ plat/xilinx/zynqmp/tsp/tsp_plat_setup.c | 4 +++- 2 files changed, 5 insertions(+), 1 deletion(-) (limited to 'plat/xilinx') diff --git a/plat/xilinx/zynqmp/bl31_zynqmp_setup.c b/plat/xilinx/zynqmp/bl31_zynqmp_setup.c index 2ea8b1c9..ffed591c 100644 --- a/plat/xilinx/zynqmp/bl31_zynqmp_setup.c +++ b/plat/xilinx/zynqmp/bl31_zynqmp_setup.c @@ -158,6 +158,8 @@ void bl31_plat_arch_setup(void) BL31_COHERENT_RAM_LIMIT - BL31_RO_BASE, BL31_RO_BASE, BL31_RO_LIMIT, + 0, + 0, BL31_COHERENT_RAM_BASE, BL31_COHERENT_RAM_LIMIT); enable_mmu_el3(0); diff --git a/plat/xilinx/zynqmp/tsp/tsp_plat_setup.c b/plat/xilinx/zynqmp/tsp/tsp_plat_setup.c index 19e2c129..ae66fa41 100644 --- a/plat/xilinx/zynqmp/tsp/tsp_plat_setup.c +++ b/plat/xilinx/zynqmp/tsp/tsp_plat_setup.c @@ -93,7 +93,9 @@ void tsp_plat_arch_setup(void) arm_setup_page_tables(BL32_RO_BASE, (BL32_END - BL32_RO_BASE), BL32_RO_BASE, - BL32_RO_LIMIT + BL32_RO_LIMIT, + 0, + 0 #if USE_COHERENT_MEM , BL32_COHERENT_RAM_BASE, BL32_COHERENT_RAM_LIMIT -- cgit v1.2.3