From e2a65959bc610a4928a77b78532fec349a9cacb4 Mon Sep 17 00:00:00 2001 From: Jimmy Huang Date: Fri, 4 Mar 2016 20:18:58 +0800 Subject: mt8173: Add #error directive to prevent RESET_TO_BL31 MT8173 platform code is incompatible with RESET_TO_BL31, add #error directive to prevent the case. We also move mt8173_def.h and plat_private.h to include directory, and remove some unnecessary code. Change-Id: I47b8d0a506820a4ea1fbe8c8fb0ec6c68d88feb5 Signed-off-by: Jimmy Huang --- plat/mediatek/mt8173/aarch64/platform_common.c | 2 +- plat/mediatek/mt8173/bl31_plat_setup.c | 2 - plat/mediatek/mt8173/include/mt8173_def.h | 118 +++++++++++++++++++++++++ plat/mediatek/mt8173/include/plat_private.h | 56 ++++++++++++ plat/mediatek/mt8173/include/platform_def.h | 18 +++- plat/mediatek/mt8173/mt8173_def.h | 115 ------------------------ plat/mediatek/mt8173/plat_private.h | 56 ------------ plat/mediatek/mt8173/platform.mk | 1 - 8 files changed, 191 insertions(+), 177 deletions(-) create mode 100644 plat/mediatek/mt8173/include/mt8173_def.h create mode 100644 plat/mediatek/mt8173/include/plat_private.h delete mode 100644 plat/mediatek/mt8173/mt8173_def.h delete mode 100644 plat/mediatek/mt8173/plat_private.h (limited to 'plat/mediatek') diff --git a/plat/mediatek/mt8173/aarch64/platform_common.c b/plat/mediatek/mt8173/aarch64/platform_common.c index b537f7b2..23116f5d 100644 --- a/plat/mediatek/mt8173/aarch64/platform_common.c +++ b/plat/mediatek/mt8173/aarch64/platform_common.c @@ -44,7 +44,7 @@ static const int cci_map[] = { /* Table of regions to map using the MMU. */ const mmap_region_t plat_mmap[] = { /* for TF text, RO, RW */ - MAP_REGION_FLAT(TZRAM_BASE, TZRAM_SIZE + TZRAM2_SIZE, + MAP_REGION_FLAT(TZRAM_BASE, TZRAM_SIZE, MT_MEMORY | MT_RW | MT_SECURE), MAP_REGION_FLAT(MTK_DEV_RNG0_BASE, MTK_DEV_RNG0_SIZE, MT_DEVICE | MT_RW | MT_SECURE), diff --git a/plat/mediatek/mt8173/bl31_plat_setup.c b/plat/mediatek/mt8173/bl31_plat_setup.c index ec951432..87837759 100644 --- a/plat/mediatek/mt8173/bl31_plat_setup.c +++ b/plat/mediatek/mt8173/bl31_plat_setup.c @@ -146,8 +146,6 @@ void bl31_early_platform_setup(bl31_params_t *from_bl2, assert(from_bl2->h.type == PARAM_BL31); assert(from_bl2->h.version >= VERSION_1); - assert(((unsigned long)plat_params_from_bl2) == MT_BL31_PLAT_PARAM_VAL); - bl32_ep_info = *from_bl2->bl32_ep_info; bl33_ep_info = *from_bl2->bl33_ep_info; } diff --git a/plat/mediatek/mt8173/include/mt8173_def.h b/plat/mediatek/mt8173/include/mt8173_def.h new file mode 100644 index 00000000..71668c75 --- /dev/null +++ b/plat/mediatek/mt8173/include/mt8173_def.h @@ -0,0 +1,118 @@ +/* + * Copyright (c) 2014-2015, ARM Limited and Contributors. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * Neither the name of ARM nor the names of its contributors may be used + * to endorse or promote products derived from this software without specific + * prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef __MT8173_DEF_H__ +#define __MT8173_DEF_H__ + +#if RESET_TO_BL31 +#error "MT8173 is incompatible with RESET_TO_BL31!" +#endif + +#define MT8173_PRIMARY_CPU 0x0 + +/* Register base address */ +#define IO_PHYS (0x10000000) +#define INFRACFG_AO_BASE (IO_PHYS + 0x1000) +#define PERI_CON_BASE (IO_PHYS + 0x3000) +#define GPIO_BASE (IO_PHYS + 0x5000) +#define SPM_BASE (IO_PHYS + 0x6000) +#define RGU_BASE (IO_PHYS + 0x7000) +#define PMIC_WRAP_BASE (IO_PHYS + 0xD000) +#define MCUCFG_BASE (IO_PHYS + 0x200000) +#define TRNG_BASE (IO_PHYS + 0x20F000) +#define MT_GIC_BASE (IO_PHYS + 0x220000) +#define PLAT_MT_CCI_BASE (IO_PHYS + 0x390000) + +/* Aggregate of all devices in the first GB */ +#define MTK_DEV_RNG0_BASE IO_PHYS +#define MTK_DEV_RNG0_SIZE 0x400000 +#define MTK_DEV_RNG1_BASE (IO_PHYS + 0x1000000) +#define MTK_DEV_RNG1_SIZE 0x4000000 + +/******************************************************************************* + * UART related constants + ******************************************************************************/ +#define MT8173_UART0_BASE (IO_PHYS + 0x01002000) +#define MT8173_UART1_BASE (IO_PHYS + 0x01003000) +#define MT8173_UART2_BASE (IO_PHYS + 0x01004000) +#define MT8173_UART3_BASE (IO_PHYS + 0x01005000) + +#define MT8173_BAUDRATE (115200) +#define MT8173_UART_CLOCK (26000000) + +/******************************************************************************* + * System counter frequency related constants + ******************************************************************************/ +#define SYS_COUNTER_FREQ_IN_TICKS 13000000 +#define SYS_COUNTER_FREQ_IN_MHZ 13 + +/******************************************************************************* + * GIC-400 & interrupt handling related constants + ******************************************************************************/ + +/* Base MTK_platform compatible GIC memory map */ +#define BASE_GICD_BASE (MT_GIC_BASE + 0x1000) +#define BASE_GICC_BASE (MT_GIC_BASE + 0x2000) +#define BASE_GICR_BASE 0 /* no GICR in GIC-400 */ +#define BASE_GICH_BASE (MT_GIC_BASE + 0x4000) +#define BASE_GICV_BASE (MT_GIC_BASE + 0x6000) +#define INT_POL_CTL0 0x10200620 + +#define GIC_PRIVATE_SIGNALS (32) + +/******************************************************************************* + * CCI-400 related constants + ******************************************************************************/ +#define PLAT_MT_CCI_CLUSTER0_SL_IFACE_IX 4 +#define PLAT_MT_CCI_CLUSTER1_SL_IFACE_IX 3 + +/******************************************************************************* + * WDT related constants + ******************************************************************************/ +#define MTK_WDT_BASE (RGU_BASE + 0) +#define MTK_WDT_SWRST (MTK_WDT_BASE + 0x0014) + +#define MTK_WDT_MODE_DUAL_MODE 0x0040 +#define MTK_WDT_MODE_IRQ 0x0008 +#define MTK_WDT_MODE_KEY 0x22000000 +#define MTK_WDT_MODE_EXTEN 0x0004 +#define MTK_WDT_SWRST_KEY 0x1209 + +/* FIQ platform related define */ +#define MT_IRQ_SEC_SGI_0 8 +#define MT_IRQ_SEC_SGI_1 9 +#define MT_IRQ_SEC_SGI_2 10 +#define MT_IRQ_SEC_SGI_3 11 +#define MT_IRQ_SEC_SGI_4 12 +#define MT_IRQ_SEC_SGI_5 13 +#define MT_IRQ_SEC_SGI_6 14 +#define MT_IRQ_SEC_SGI_7 15 + +#endif /* __MT8173_DEF_H__ */ diff --git a/plat/mediatek/mt8173/include/plat_private.h b/plat/mediatek/mt8173/include/plat_private.h new file mode 100644 index 00000000..bdde6a6c --- /dev/null +++ b/plat/mediatek/mt8173/include/plat_private.h @@ -0,0 +1,56 @@ +/* + * Copyright (c) 2014-2015, ARM Limited and Contributors. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * Neither the name of ARM nor the names of its contributors may be used + * to endorse or promote products derived from this software without specific + * prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef __PLAT_PRIVATE_H__ +#define __PLAT_PRIVATE_H__ + +/******************************************************************************* + * Function and variable prototypes + ******************************************************************************/ +void plat_configure_mmu_el3(unsigned long total_base, + unsigned long total_size, + unsigned long, + unsigned long, + unsigned long, + unsigned long); + +void plat_cci_init(void); +void plat_cci_enable(void); +void plat_cci_disable(void); + +/* Declarations for plat_mt_gic.c */ +void plat_mt_gic_init(void); + +/* Declarations for plat_topology.c */ +int mt_setup_topology(void); + +void plat_delay_timer_init(void); + +#endif /* __PLAT_PRIVATE_H__ */ diff --git a/plat/mediatek/mt8173/include/platform_def.h b/plat/mediatek/mt8173/include/platform_def.h index 0573bc5e..dc5b000e 100644 --- a/plat/mediatek/mt8173/include/platform_def.h +++ b/plat/mediatek/mt8173/include/platform_def.h @@ -70,7 +70,21 @@ /******************************************************************************* * Platform memory map related constants ******************************************************************************/ -/* TF txet, ro, rw, internal SRAM, Size: release: 80KB, debug: 92KB */ +/* + * MT8173 SRAM memory layout + * 0x100000 +-------------------+ + * | shared mem (4KB) | + * 0x101000 +-------------------+ + * | | + * | BL3-1 (124KB) | + * | | + * 0x120000 +-------------------+ + * | reserved (64KB) | + * 0x130000 +-------------------+ + */ +/* TF txet, ro, rw, xlat table, coherent memory ... etc. + * Size: release: 128KB, debug: 128KB + */ #define TZRAM_BASE (0x100000) #if DEBUG #define TZRAM_SIZE (0x20000) @@ -78,7 +92,7 @@ #define TZRAM_SIZE (0x20000) #endif -/* xlat_table , coherence ram, 64KB */ +/* Reserved: 64KB */ #define TZRAM2_BASE (TZRAM_BASE + TZRAM_SIZE) #define TZRAM2_SIZE (0x10000) diff --git a/plat/mediatek/mt8173/mt8173_def.h b/plat/mediatek/mt8173/mt8173_def.h deleted file mode 100644 index ecf4cc63..00000000 --- a/plat/mediatek/mt8173/mt8173_def.h +++ /dev/null @@ -1,115 +0,0 @@ -/* - * Copyright (c) 2014-2015, ARM Limited and Contributors. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * - * Neither the name of ARM nor the names of its contributors may be used - * to endorse or promote products derived from this software without specific - * prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. - */ - -#ifndef __PLAT_DEF_H__ -#define __PLAT_DEF_H__ - -#define MT8173_PRIMARY_CPU 0x0 - -/* Special value used to verify platform parameters from BL2 to BL3-1 */ -#define MT_BL31_PLAT_PARAM_VAL 0x0f1e2d3c4b5a6978ULL - -#define IO_PHYS (0x10000000) -#define INFRACFG_AO_BASE (IO_PHYS + 0x1000) -#define GPIO_BASE (IO_PHYS + 0x5000) -#define SPM_BASE (IO_PHYS + 0x6000) -#define RGU_BASE (IO_PHYS + 0x7000) -#define PMIC_WRAP_BASE (IO_PHYS + 0xD000) -#define MCUCFG_BASE (IO_PHYS + 0x200000) -#define TRNG_base (IO_PHYS + 0x20F000) -#define MT_GIC_BASE (IO_PHYS + 0x220000) -#define PLAT_MT_CCI_BASE (IO_PHYS + 0x390000) - -/* Aggregate of all devices in the first GB */ -#define MTK_DEV_RNG0_BASE IO_PHYS -#define MTK_DEV_RNG0_SIZE 0x400000 -#define MTK_DEV_RNG1_BASE (IO_PHYS + 0x1000000) -#define MTK_DEV_RNG1_SIZE 0x4000000 - -/******************************************************************************* - * UART related constants - ******************************************************************************/ -#define MT8173_UART0_BASE (IO_PHYS + 0x01002000) -#define MT8173_UART1_BASE (IO_PHYS + 0x01003000) -#define MT8173_UART2_BASE (IO_PHYS + 0x01004000) -#define MT8173_UART3_BASE (IO_PHYS + 0x01005000) - -#define MT8173_BAUDRATE (115200) -#define MT8173_UART_CLOCK (26000000) - -/******************************************************************************* - * System counter frequency related constants - ******************************************************************************/ -#define SYS_COUNTER_FREQ_IN_TICKS 13000000 -#define SYS_COUNTER_FREQ_IN_MHZ 13 - -/******************************************************************************* - * GIC-400 & interrupt handling related constants - ******************************************************************************/ - -/* Base MTK_platform compatible GIC memory map */ -#define BASE_GICD_BASE (MT_GIC_BASE + 0x1000) -#define BASE_GICC_BASE (MT_GIC_BASE + 0x2000) -#define BASE_GICR_BASE 0 /* no GICR in GIC-400 */ -#define BASE_GICH_BASE (MT_GIC_BASE + 0x4000) -#define BASE_GICV_BASE (MT_GIC_BASE + 0x6000) -#define INT_POL_CTL0 0x10200620 - -#define GIC_PRIVATE_SIGNALS (32) - -/******************************************************************************* - * CCI-400 related constants - ******************************************************************************/ -#define PLAT_MT_CCI_CLUSTER0_SL_IFACE_IX 4 -#define PLAT_MT_CCI_CLUSTER1_SL_IFACE_IX 3 - -/******************************************************************************* - * WDT related constants - ******************************************************************************/ -#define MTK_WDT_BASE (RGU_BASE + 0) -#define MTK_WDT_SWRST (MTK_WDT_BASE + 0x0014) - -#define MTK_WDT_MODE_DUAL_MODE 0x0040 -#define MTK_WDT_MODE_IRQ 0x0008 -#define MTK_WDT_MODE_KEY 0x22000000 -#define MTK_WDT_MODE_EXTEN 0x0004 -#define MTK_WDT_SWRST_KEY 0x1209 - -/* FIQ platform related define */ -#define MT_IRQ_SEC_SGI_0 8 -#define MT_IRQ_SEC_SGI_1 9 -#define MT_IRQ_SEC_SGI_2 10 -#define MT_IRQ_SEC_SGI_3 11 -#define MT_IRQ_SEC_SGI_4 12 -#define MT_IRQ_SEC_SGI_5 13 -#define MT_IRQ_SEC_SGI_6 14 -#define MT_IRQ_SEC_SGI_7 15 - -#endif /* __PLAT_DEF_H__ */ diff --git a/plat/mediatek/mt8173/plat_private.h b/plat/mediatek/mt8173/plat_private.h deleted file mode 100644 index bdde6a6c..00000000 --- a/plat/mediatek/mt8173/plat_private.h +++ /dev/null @@ -1,56 +0,0 @@ -/* - * Copyright (c) 2014-2015, ARM Limited and Contributors. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * - * Neither the name of ARM nor the names of its contributors may be used - * to endorse or promote products derived from this software without specific - * prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. - */ - -#ifndef __PLAT_PRIVATE_H__ -#define __PLAT_PRIVATE_H__ - -/******************************************************************************* - * Function and variable prototypes - ******************************************************************************/ -void plat_configure_mmu_el3(unsigned long total_base, - unsigned long total_size, - unsigned long, - unsigned long, - unsigned long, - unsigned long); - -void plat_cci_init(void); -void plat_cci_enable(void); -void plat_cci_disable(void); - -/* Declarations for plat_mt_gic.c */ -void plat_mt_gic_init(void); - -/* Declarations for plat_topology.c */ -int mt_setup_topology(void); - -void plat_delay_timer_init(void); - -#endif /* __PLAT_PRIVATE_H__ */ diff --git a/plat/mediatek/mt8173/platform.mk b/plat/mediatek/mt8173/platform.mk index 30df32f2..7f07c15b 100644 --- a/plat/mediatek/mt8173/platform.mk +++ b/plat/mediatek/mt8173/platform.mk @@ -32,7 +32,6 @@ MTK_PLAT := plat/mediatek MTK_PLAT_SOC := ${MTK_PLAT}/${PLAT} PLAT_INCLUDES := -I${MTK_PLAT}/common/ \ - -I${MTK_PLAT_SOC}/ \ -I${MTK_PLAT_SOC}/drivers/gpio/ \ -I${MTK_PLAT_SOC}/drivers/mtcmos/ \ -I${MTK_PLAT_SOC}/drivers/pmic/ \ -- cgit v1.2.3