From 1541d8a9e3c7704b6ca0aa66f6dacf6e10b70bb6 Mon Sep 17 00:00:00 2001
From: Bai Ping <ping.bai@nxp.com>
Date: Tue, 19 Jun 2018 13:11:13 +0800
Subject: plat: imx8mm: enable power domain support

Enable the power domain support on imx8mm.

Signed-off-by: Bai Ping <ping.bai@nxp.com>
---
 plat/imx/imx8mm/imx8mm_bl31_setup.c | 5 +++++
 1 file changed, 5 insertions(+)

(limited to 'plat/imx/imx8mm/imx8mm_bl31_setup.c')

diff --git a/plat/imx/imx8mm/imx8mm_bl31_setup.c b/plat/imx/imx8mm/imx8mm_bl31_setup.c
index 43309d31..cc30c7a4 100644
--- a/plat/imx/imx8mm/imx8mm_bl31_setup.c
+++ b/plat/imx/imx8mm/imx8mm_bl31_setup.c
@@ -13,6 +13,7 @@
 #include <debug.h>
 #include <stdbool.h>
 #include <dram.h>
+#include <generic_delay_timer.h>
 #include <mmio.h>
 #include <platform.h>
 #include <platform_def.h>
@@ -269,6 +270,8 @@ void bl31_plat_arch_setup(void)
 
 	mmap_add_region(0x180000, 0x180000, 0x8000, MT_MEMORY | MT_RW);
 
+	mmap_add_region(0x38330000, 0x38330000, 0x100000, MT_DEVICE | MT_RW);
+
 #if USE_COHERENT_MEM
 	mmap_add_region(BL31_COHERENT_RAM_BASE, BL31_COHERENT_RAM_BASE,
 		BL31_COHERENT_RAM_LIMIT - BL31_COHERENT_RAM_BASE,
@@ -283,6 +286,8 @@ void bl31_plat_arch_setup(void)
 
 void bl31_platform_setup(void)
 {
+	generic_delay_timer_init();
+
 	/* select the CKIL source to 32K OSC */
 	mmio_write_32(0x30360124, 0x1);
 
-- 
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