From ac166f64e2397f2c12f261e2baf6f63ae89de385 Mon Sep 17 00:00:00 2001 From: Jacky Bai Date: Tue, 21 May 2019 20:24:52 +0800 Subject: plat: imx8m: Add the aipstz init to config peripheral access AIPSTZ provide access control for all the peripherals connected to it. In this patch all the perperals are configured accessible to all the master. it can be customized based the actual use case. Signed-off-by: Jacky Bai Change-Id: I5ef5baa1da6906f13a60923d27ede336c61e319a --- plat/imx/imx8m/imx8mq/imx8mq_bl31_setup.c | 11 +++++++++++ 1 file changed, 11 insertions(+) (limited to 'plat/imx/imx8m/imx8mq/imx8mq_bl31_setup.c') diff --git a/plat/imx/imx8m/imx8mq/imx8mq_bl31_setup.c b/plat/imx/imx8m/imx8mq/imx8mq_bl31_setup.c index eadf8811..47eae86d 100644 --- a/plat/imx/imx8m/imx8mq/imx8mq_bl31_setup.c +++ b/plat/imx/imx8m/imx8mq/imx8mq_bl31_setup.c @@ -22,6 +22,7 @@ #include #include +#include #include #include @@ -32,6 +33,14 @@ static const mmap_region_t imx_mmap[] = { {0}, }; +static const struct aipstz_cfg aipstz[] = { + {AIPSTZ1_BASE, 0x77777777, 0x77777777, .opacr = {0x0, 0x0, 0x0, 0x0, 0x0}, }, + {AIPSTZ2_BASE, 0x77777777, 0x77777777, .opacr = {0x0, 0x0, 0x0, 0x0, 0x0}, }, + {AIPSTZ3_BASE, 0x77777777, 0x77777777, .opacr = {0x0, 0x0, 0x0, 0x0, 0x0}, }, + {AIPSTZ4_BASE, 0x77777777, 0x77777777, .opacr = {0x0, 0x0, 0x0, 0x0, 0x0}, }, + {0}, +}; + static entry_point_info_t bl32_image_ep_info; static entry_point_info_t bl33_image_ep_info; @@ -78,6 +87,8 @@ void bl31_early_platform_setup2(u_register_t arg0, u_register_t arg1, mmio_write_32(IMX_CSU_BASE + i * 4, 0xffffffff); } + imx_aipstz_init(aipstz); + /* config CAAM JRaMID set MID to Cortex A */ mmio_write_32(CAAM_JR0MID, CAAM_NS_MID); mmio_write_32(CAAM_JR1MID, CAAM_NS_MID); -- cgit v1.2.3