From 61d8cbdf027c0b00ca4c2dbe00d6e0b896cc7b42 Mon Sep 17 00:00:00 2001 From: Anson Huang Date: Mon, 14 Aug 2017 23:24:27 +0800 Subject: i.mx8qm/i.mx8qxp: add SIP cpu-freq support Linux kernel will issue cpu-freq scale via SIP, ATF calls SCFW API to finish the CPU frequency scale. Move SIP service code from i.mx8mq to common place for all i.mx SoCs. Signed-off-by: Anson Huang --- plat/freescale/common/cpufreq.c | 57 +++++++++++++++++++++ plat/freescale/common/include/fsl_sip.h | 28 +++++++++++ plat/freescale/common/sip_svc.c | 88 +++++++++++++++++++++++++++++++++ 3 files changed, 173 insertions(+) create mode 100644 plat/freescale/common/cpufreq.c create mode 100644 plat/freescale/common/include/fsl_sip.h create mode 100644 plat/freescale/common/sip_svc.c (limited to 'plat/freescale/common') diff --git a/plat/freescale/common/cpufreq.c b/plat/freescale/common/cpufreq.c new file mode 100644 index 00000000..75f005dd --- /dev/null +++ b/plat/freescale/common/cpufreq.c @@ -0,0 +1,57 @@ +/* + * Copyright 2017 NXP + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * as published by the Free Software Foundation; either version 2 + * of the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +extern sc_ipc_t ipc_handle; + +const static int ap_cluster_index[2] = { + SC_R_A53, SC_R_A72, +}; + +static void imx_cpufreq_set_target(uint32_t cluster_id, unsigned long freq) +{ + sc_pm_clock_rate_t rate = (sc_pm_clock_rate_t)freq; + +#ifdef PLAT_IMX8QM + sc_pm_set_clock_rate(ipc_handle, ap_cluster_index[cluster_id], SC_PM_CLK_CPU, &rate); +#endif +#ifdef PLAT_IMX8QXP + sc_pm_set_clock_rate(ipc_handle, SC_R_A35, SC_PM_CLK_CPU, &rate); +#endif +} + +int imx_cpufreq_handler(uint32_t smc_fid, + u_register_t x1, + u_register_t x2, + u_register_t x3) +{ + switch(x1) { + case FSL_SIP_SET_CPUFREQ: + imx_cpufreq_set_target(x2, x3); + break; + default: + return SMC_UNK; + } + + return 0; +} diff --git a/plat/freescale/common/include/fsl_sip.h b/plat/freescale/common/include/fsl_sip.h new file mode 100644 index 00000000..52dceb81 --- /dev/null +++ b/plat/freescale/common/include/fsl_sip.h @@ -0,0 +1,28 @@ +/* + * Copyright 2017 NXP + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * as published by the Free Software Foundation; either version 2 + * of the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#ifndef __SOC_FSL_SIP_H +#define __SOC_FSL_SIP_H + +#define FSL_SIP_GPC 0xC2000000 +#define FSL_SIP_CONFIG_GPC_MASK 0x00 +#define FSL_SIP_CONFIG_GPC_UNMASK 0x01 +#define FSL_SIP_CONFIG_GPC_SET_WAKE 0x02 +#define FSL_SIP_CONFIG_GPC_PM_DOMAIN 0x03 + +#define FSL_SIP_CPUFREQ 0xC2000001 +#define FSL_SIP_SET_CPUFREQ 0x00 + + +#endif diff --git a/plat/freescale/common/sip_svc.c b/plat/freescale/common/sip_svc.c new file mode 100644 index 00000000..d8c1c5bf --- /dev/null +++ b/plat/freescale/common/sip_svc.c @@ -0,0 +1,88 @@ +/* + * Copyright (c) 2015, ARM Limited and Contributors. All rights reserved. + * Copyright 2017 NXP + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * Neither the name of ARM nor the names of its contributors may be used + * to endorse or promote products derived from this software without specific + * prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +#include +#include +#include +#include +#include +#include +#include + +extern int imx_gpc_handler(uint32_t smc_fid, u_register_t x1, u_register_t x2, u_register_t x3); +extern int imx_cpufreq_handler(uint32_t smc_fid, u_register_t x1, u_register_t x2, u_register_t x3); + +/* Setup i.MX platform specific services Services */ +static int32_t plat_svc_setup(void) +{ + /* gpc init ?*/ + NOTICE("sip svc init\n"); + return 0; +} + +/* i.MX platform specific service SMC handler */ +uintptr_t imx_svc_smc_handler(uint32_t smc_fid, + u_register_t x1, + u_register_t x2, + u_register_t x3, + u_register_t x4, + void *cookie, + void *handle, + uint64_t flags) +{ + NOTICE("smc_fid is %x\n", smc_fid); + switch (smc_fid) { +#ifdef PLAT_IMX8M + case FSL_SIP_GPC: + SMC_RET1(handle, imx_gpc_handler(smc_fid, x1, x2, x3)); + break; +#endif +#if (defined(PLAT_IMX8QM) || defined(PLAT_IMX8QXP)) + case FSL_SIP_CPUFREQ: + SMC_RET1(handle, imx_cpufreq_handler(smc_fid, x1, x2, x3)); + break; +#endif + default: + WARN("Unimplemented SIP Service Call: 0x%x \n", smc_fid); + SMC_RET1(handle, SMC_UNK); + break; + } +} + +/* Rigister SIP Service Calls as runtime service */ +DECLARE_RT_SVC( + imx_svc, + OEN_SIP_START, + OEN_SIP_END, + SMC_TYPE_FAST, + plat_svc_setup, + imx_svc_smc_handler +); -- cgit v1.2.3