From 085e80ec111b2ab3607f0f38f6ef0062922bc196 Mon Sep 17 00:00:00 2001 From: Antonio Nino Diaz Date: Wed, 21 Mar 2018 10:49:27 +0000 Subject: Rename 'smcc' to 'smccc' When the source code says 'SMCC' it is talking about the SMC Calling Convention. The correct acronym is SMCCC. This affects a few definitions and file names. Some files have been renamed (smcc.h, smcc_helpers.h and smcc_macros.S) but the old files have been kept for compatibility, they include the new ones with an ERROR_DEPRECATED guard. Change-Id: I78f94052a502436fdd97ca32c0fe86bd58173f2f Signed-off-by: Antonio Nino Diaz --- bl1/aarch32/bl1_context_mgmt.c | 4 ++-- bl1/aarch32/bl1_entrypoint.S | 6 +++--- bl1/aarch32/bl1_exceptions.S | 8 ++++---- bl1/aarch64/bl1_exceptions.S | 4 ++-- bl1/bl1_fwu.c | 2 +- bl1/bl1_main.c | 2 +- 6 files changed, 13 insertions(+), 13 deletions(-) (limited to 'bl1') diff --git a/bl1/aarch32/bl1_context_mgmt.c b/bl1/aarch32/bl1_context_mgmt.c index 6623dfc4..d1fd3ca0 100644 --- a/bl1/aarch32/bl1_context_mgmt.c +++ b/bl1/aarch32/bl1_context_mgmt.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2016, ARM Limited and Contributors. All rights reserved. + * Copyright (c) 2016-2018, ARM Limited and Contributors. All rights reserved. * * SPDX-License-Identifier: BSD-3-Clause */ @@ -10,7 +10,7 @@ #include #include #include -#include +#include #include "../bl1_private.h" /* diff --git a/bl1/aarch32/bl1_entrypoint.S b/bl1/aarch32/bl1_entrypoint.S index 77806269..16b26b9f 100644 --- a/bl1/aarch32/bl1_entrypoint.S +++ b/bl1/aarch32/bl1_entrypoint.S @@ -1,5 +1,5 @@ /* - * Copyright (c) 2016-2017, ARM Limited and Contributors. All rights reserved. + * Copyright (c) 2016-2018, ARM Limited and Contributors. All rights reserved. * * SPDX-License-Identifier: BSD-3-Clause */ @@ -9,8 +9,8 @@ #include #include #include -#include -#include +#include +#include .globl bl1_vector_table .globl bl1_entrypoint diff --git a/bl1/aarch32/bl1_exceptions.S b/bl1/aarch32/bl1_exceptions.S index a1e32f06..15405424 100644 --- a/bl1/aarch32/bl1_exceptions.S +++ b/bl1/aarch32/bl1_exceptions.S @@ -1,5 +1,5 @@ /* - * Copyright (c) 2016, ARM Limited and Contributors. All rights reserved. + * Copyright (c) 2016-2018, ARM Limited and Contributors. All rights reserved. * * SPDX-License-Identifier: BSD-3-Clause */ @@ -9,8 +9,8 @@ #include #include #include -#include -#include +#include +#include #include .globl bl1_aarch32_smc_handler @@ -93,7 +93,7 @@ func smc_handler * Save the GP registers. * ----------------------------------------------------- */ - smcc_save_gp_mode_regs + smccc_save_gp_mode_regs /* * `sp` still points to `smc_ctx_t`. Save it to a register diff --git a/bl1/aarch64/bl1_exceptions.S b/bl1/aarch64/bl1_exceptions.S index 92313fa3..7ac028a5 100644 --- a/bl1/aarch64/bl1_exceptions.S +++ b/bl1/aarch64/bl1_exceptions.S @@ -1,5 +1,5 @@ /* - * Copyright (c) 2013-2016, ARM Limited and Contributors. All rights reserved. + * Copyright (c) 2013-2018, ARM Limited and Contributors. All rights reserved. * * SPDX-License-Identifier: BSD-3-Clause */ @@ -218,7 +218,7 @@ unexpected_sync_exception: smc_handler: /* ----------------------------------------------------- * Save the GP registers x0-x29. - * TODO: Revisit to store only SMCC specified registers. + * TODO: Revisit to store only SMCCC specified registers. * ----------------------------------------------------- */ bl save_gp_registers diff --git a/bl1/bl1_fwu.c b/bl1/bl1_fwu.c index 38780833..ed027abc 100644 --- a/bl1/bl1_fwu.c +++ b/bl1/bl1_fwu.c @@ -15,7 +15,7 @@ #include #include #include -#include +#include #include #include #include "bl1_private.h" diff --git a/bl1/bl1_main.c b/bl1/bl1_main.c index c3332853..9f7e2901 100644 --- a/bl1/bl1_main.c +++ b/bl1/bl1_main.c @@ -15,7 +15,7 @@ #include #include #include -#include +#include #include #include #include "bl1_private.h" -- cgit v1.2.3