From f8b639ddea3be778b006d1a5397d21e2ca6ae7c8 Mon Sep 17 00:00:00 2001 From: Silvano di Ninno Date: Fri, 9 Mar 2018 19:13:44 +0100 Subject: MLK-17591-1: CSU Fix Slave configuration there is a bug in the CSL assignment. the CSL(n) and CSL(n+1) configuration were reversed. Signed-off-by: Silvano di Ninno Reviewed-by: Peng Fan --- plat/imx/imx8mq/imx_csu.c | 26 +++++++++++++++----------- 1 file changed, 15 insertions(+), 11 deletions(-) diff --git a/plat/imx/imx8mq/imx_csu.c b/plat/imx/imx8mq/imx_csu.c index 194644c1..3362908d 100644 --- a/plat/imx/imx8mq/imx_csu.c +++ b/plat/imx/imx8mq/imx_csu.c @@ -151,18 +151,22 @@ void csu_set_slave_index_mode(enum csu_csln_idx index, NOTICE("CSU CSLn(%d) already locked with mode:0x%x\n", index, read_mode); return; } - if (read_mode == mode && lock == 0) { + if (read_mode == mode) { NOTICE("CSU CSLn(%d) mode 0x%x already written\n", index, read_mode); return; } reg = (uintptr_t)(IMX_CSU_BASE + (index / 2) * 4); tmp = mmio_read_32(reg); - if (index % 2 == 0) { + + if (lock) + mode |= 1 << 8; + + if (index % 2) { tmp &= 0x0000ffff; - tmp |= mode << 16 | lock << 24; + tmp |= mode << 16; } else { tmp &= 0xffff0000; - tmp |= mode | lock << 8; + tmp |= mode; } mmio_write_32(reg, tmp); } @@ -175,13 +179,13 @@ void csu_get_slave_index_mode(enum csu_csln_idx index, reg = (uintptr_t)(IMX_CSU_BASE + (index / 2) * 4); tmp = mmio_read_32(reg); - if (index % 2 == 0) { - *mode = (uint16_t)(tmp >> 16 & 0xff); - *lock = (uint8_t)(tmp >> 24 & 0x01); - } else { - *mode = (uint16_t)(tmp & 0xff); - *lock = (uint8_t)(tmp >> 8 & 0x01); - } + if (index % 2) + tmp = tmp >> 16; + + tmp &= 0x1ff; + + *mode = tmp & 0xff; + *lock = tmp >> 8; } void csu_set_slaves_modes(struct csu_slave_conf *csu_config, uint32_t count) -- cgit v1.2.3