From ebeb5ca6793fefdcbefb8b3b6b1ccff06ecf693b Mon Sep 17 00:00:00 2001 From: Anson Huang Date: Wed, 25 Mar 2020 20:14:43 +0800 Subject: plat: imx8dxl: Update IRQSTEER mask offset for proper wakeup i.MX8DXL ONLY supports up to 12*32 interrupt number, so the first SPI interrupt offset should be from 0x2c. Signed-off-by: Anson Huang (cherry picked from commit cd0519bf70382292768adc1e9c0337808c55f148) --- plat/imx/imx8dxl/imx8dxl_psci.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/plat/imx/imx8dxl/imx8dxl_psci.c b/plat/imx/imx8dxl/imx8dxl_psci.c index d462762b..f8ffaf28 100644 --- a/plat/imx/imx8dxl/imx8dxl_psci.c +++ b/plat/imx/imx8dxl/imx8dxl_psci.c @@ -36,9 +36,9 @@ static void imx_enable_irqstr_wakeup(void) /* enable the irqsteer to handle wakeup irq */ mmio_write_32(IMX_WUP_IRQSTR_BASE, 0x1); - for (int i = 0; i < 15; i++) { + for (int i = 0; i < 11; i++) { irq_mask = dist_ctx->gicd_isenabler[i]; - mmio_write_32(IMX_WUP_IRQSTR_BASE + 0x3c - 0x4 * i, irq_mask); + mmio_write_32(IMX_WUP_IRQSTR_BASE + 0x2c - 0x4 * i, irq_mask); } /* set IRQSTR low power mode */ @@ -55,7 +55,7 @@ static void imx_disable_irqstr_wakeup(void) /* disable the irqsteer */ mmio_write_32(IMX_WUP_IRQSTR_BASE, 0x0); - for (int i = 0; i < 16; i++) + for (int i = 0; i < 12; i ++) mmio_write_32(IMX_WUP_IRQSTR_BASE + 0x4 + 0x4 * i, 0x0); /* Put IRQSTEER into OFF mode */ -- cgit v1.2.3