From c971143235f2db9b0ab7c9480cdca6963ac15c65 Mon Sep 17 00:00:00 2001 From: Dimitris Papastamos Date: Mon, 19 Jun 2017 15:54:58 +0100 Subject: juno: Fix AArch32 build Commit 6de8b24f52cf2bd74adefbaa86dd2a0676c3eaa2 broke Juno AArch32 build. Change-Id: Ied70d9becb86e53ccb46a2e3245e2a551d1bf701 Signed-off-by: Dimitris Papastamos --- plat/arm/board/juno/aarch32/juno_helpers.S | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-) diff --git a/plat/arm/board/juno/aarch32/juno_helpers.S b/plat/arm/board/juno/aarch32/juno_helpers.S index 5044a240..824002ae 100644 --- a/plat/arm/board/juno/aarch32/juno_helpers.S +++ b/plat/arm/board/juno/aarch32/juno_helpers.S @@ -81,9 +81,9 @@ func JUNO_HANDLER(0) * Cortex-A57 specific settings * -------------------------------------------------------------------- */ - mov r0, #((L2_DATA_RAM_LATENCY_3_CYCLES << L2CTLR_DATA_RAM_LATENCY_SHIFT) | \ - (L2_TAG_RAM_LATENCY_3_CYCLES << L2CTLR_TAG_RAM_LATENCY_SHIFT)) - stcopr r0, L2CTLR + mov r0, #((CORTEX_A57_L2_DATA_RAM_LATENCY_3_CYCLES << CORTEX_A57_L2CTLR_DATA_RAM_LATENCY_SHIFT) | \ + (CORTEX_A57_L2_TAG_RAM_LATENCY_3_CYCLES << CORTEX_A57_L2CTLR_TAG_RAM_LATENCY_SHIFT)) + stcopr r0, CORTEX_A57_L2CTLR 1: isb bx lr @@ -118,8 +118,8 @@ A57: * Cortex-A57 specific settings * -------------------------------------------------------------------- */ - mov r0, #(L2_DATA_RAM_LATENCY_3_CYCLES << L2CTLR_DATA_RAM_LATENCY_SHIFT) - stcopr r0, L2CTLR + mov r0, #(CORTEX_A57_L2_DATA_RAM_LATENCY_3_CYCLES << CORTEX_A57_L2CTLR_DATA_RAM_LATENCY_SHIFT) + stcopr r0, CORTEX_A57_L2CTLR isb bx lr endfunc JUNO_HANDLER(1) @@ -152,9 +152,9 @@ A72: * Cortex-A72 specific settings * -------------------------------------------------------------------- */ - mov r0, #((L2_DATA_RAM_LATENCY_3_CYCLES << L2CTLR_DATA_RAM_LATENCY_SHIFT) | \ - (L2_TAG_RAM_LATENCY_2_CYCLES << L2CTLR_TAG_RAM_LATENCY_SHIFT)) - stcopr r0, L2CTLR + mov r0, #((CORTEX_A72_L2_DATA_RAM_LATENCY_3_CYCLES << CORTEX_A72_L2CTLR_DATA_RAM_LATENCY_SHIFT) | \ + (CORTEX_A72_L2_TAG_RAM_LATENCY_2_CYCLES << CORTEX_A72_L2CTLR_TAG_RAM_LATENCY_SHIFT)) + stcopr r0, CORTEX_A72_L2CTLR isb bx lr endfunc JUNO_HANDLER(2) -- cgit v1.2.3