From 7a50e0e390349738b8987b49cc05edeadaeaddbc Mon Sep 17 00:00:00 2001
From: Bai Ping <ping.bai@nxp.com>
Date: Mon, 17 Sep 2018 15:48:06 +0800
Subject: plat: imx8mq: add 100us delay after USB OTG SRC bit 0 clear

After the SRC bit clear, we must wait for a while to make sure
the operation is finished.

for USB OTG, the limitations are:
1. before system clock configuration. ipg clock runs at 12.5MHz.
   delay time should longer than 82us.

2. after system clock configuration. ipg clock runs at 66.5MHz.
   delay time should longer than 15.3us.

so add udelay 100 to safely clear the SRC bit 0.

Signed-off-by: Bai Ping <ping.bai@nxp.com>
---
 plat/imx/imx8mq/gpc.c               | 10 ++++++++++
 plat/imx/imx8mq/imx8mq_bl31_setup.c |  3 +++
 plat/imx/imx8mq/platform.mk         |  2 ++
 3 files changed, 15 insertions(+)

diff --git a/plat/imx/imx8mq/gpc.c b/plat/imx/imx8mq/gpc.c
index 4daa89eb..a094bd65 100644
--- a/plat/imx/imx8mq/gpc.c
+++ b/plat/imx/imx8mq/gpc.c
@@ -5,6 +5,7 @@
  */
 
 #include <debug.h>
+#include <delay_timer.h>
 #include <stdlib.h>
 #include <stdint.h>
 #include <stdbool.h>
@@ -644,6 +645,15 @@ void imx_gpc_init(void)
 	val = mmio_read_32(0x30390024);
 	val &= ~0x1;
 	mmio_write_32(0x30390024, val);
+
+	/* for USB OTG, the limitation are:
+	 * 1. before system clock config, the IPG clock run at 12.5MHz, delay time
+	 *    should be longer than 82us.
+	 * 2. after system clock config, ipg clock run at 66.5MHz, delay time
+	 *    be longer that 15.3 us.
+	 *    Add 100us to make sure the USB OTG SRC is clear safely.
+	 */
+	udelay(100);
 }
 
 int imx_gpc_handler(uint32_t smc_fid,
diff --git a/plat/imx/imx8mq/imx8mq_bl31_setup.c b/plat/imx/imx8mq/imx8mq_bl31_setup.c
index 55289400..5fc21a56 100644
--- a/plat/imx/imx8mq/imx8mq_bl31_setup.c
+++ b/plat/imx/imx8mq/imx8mq_bl31_setup.c
@@ -12,6 +12,7 @@
 #include <context.h>
 #include <context_mgmt.h>
 #include <debug.h>
+#include <generic_delay_timer.h>
 #include <stdbool.h>
 #include <mmio.h>
 #include <platform.h>
@@ -281,6 +282,8 @@ void bl31_plat_arch_setup(void)
 
 void bl31_platform_setup(void)
 {
+	generic_delay_timer_init();
+
 	/* init the GICv3 cpu and distributor interface */
 	plat_gic_driver_init();
 	plat_gic_init();
diff --git a/plat/imx/imx8mq/platform.mk b/plat/imx/imx8mq/platform.mk
index b20ccb6c..93d61c41 100644
--- a/plat/imx/imx8mq/platform.mk
+++ b/plat/imx/imx8mq/platform.mk
@@ -29,6 +29,8 @@ BL31_SOURCES		+=	plat/imx/common/imx8_helpers.S		\
 				lib/xlat_tables/xlat_tables_common.c	\
 				lib/cpus/aarch64/cortex_a53.S		\
 				drivers/console/aarch64/console.S	\
+				drivers/delay_timer/delay_timer.c		\
+				drivers/delay_timer/generic_delay_timer.c	\
 				${PLAT_GIC_SOURCES}			\
 				${PLAT_DDR_SOURCES}			\
 				drivers/arm/tzc/tzc380.c
-- 
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