From 25687f9ad5b9e4c1458776b06601a09ba4d1013d Mon Sep 17 00:00:00 2001 From: Jacky Bai Date: Mon, 13 Apr 2020 11:07:40 +0800 Subject: MLK-23775 plat: imx8m: Fix the ddr4 dvfs random hang on imx8m In step12, remove the while loop waiting to align with the ddr4 dvfs flow on imx_2.0.y. Tested-by: Peng Fan Signed-off-by: Jacky Bai --- plat/imx/imx8m/ddr/ddr4_dvfs.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/plat/imx/imx8m/ddr/ddr4_dvfs.c b/plat/imx/imx8m/ddr/ddr4_dvfs.c index 4f55d2fe..86347928 100644 --- a/plat/imx/imx8m/ddr/ddr4_dvfs.c +++ b/plat/imx/imx8m/ddr/ddr4_dvfs.c @@ -180,8 +180,8 @@ void ddr4_swffc(struct dram_info *dram_info, unsigned int pstate) * 12. Wait until STAT.operating_mode[1:0]!=11 indicating that the * controller is not in self-refresh mode. */ - while ((mmio_read_32(DDRC_STAT(0)) & 0x3) == 0x3) - ; + if ((mmio_read_32(DDRC_STAT(0)) & 0x3) == 0x3) + printf("C: Error DRAM should not in Self Refresh\n"); /* * 13. Assert PWRCTL.selfref_sw for the DWC_ddr_umctl2 core to enter -- cgit v1.2.3