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AgeCommit message (Expand)Author
2015-09-10Pass the target suspend level to SPD suspend hooksAchin Gupta
2015-08-13PSCI: Rework generic code to conform to coding guidelinesSoby Mathew
2015-08-13PSCI: Fix the return code for invalid entrypointSoby Mathew
2015-08-13PSCI: Switch to the new PSCI frameworksSoby Mathew
2015-08-13PSCI: Implement platform compatibility layerSoby Mathew
2015-08-13PSCI: Unify warm reset entry pointsSandrine Bailleux
2015-08-13PSCI: Add framework to handle composite power statesSoby Mathew
2015-08-13PSCI: Introduce new platform interface to describe topologySoby Mathew
2015-08-13PSCI: Introduce new platform and CM helper APIsSoby Mathew
2015-08-05PSCI: Remove references to affinity based power managementSoby Mathew
2015-08-05PSCI: Invoke PM hooks only for the highest levelSoby Mathew
2015-08-05PSCI: Create new directory to implement new frameworksSoby Mathew
2015-07-02Merge pull request #324 from soby-mathew/sm/sys_suspenddanh-arm
2015-06-24Merge pull request #310 from sandrine-bailleux/sb/tf-issue-304-phase1danh-arm
2015-06-22PSCI: Add SYSTEM_SUSPEND API supportSoby Mathew
2015-06-19Fix integer extension in mpidr_set_aff_inst()Andrew Thoelke
2015-06-04Introduce PROGRAMMABLE_RESET_ADDRESS build optionSandrine Bailleux
2015-06-04Rationalize reset handling codeSandrine Bailleux
2015-05-13PSCI: Set ON_PENDING state early during CPU_ONSoby Mathew
2015-04-08Add support to indicate size and end of assembly functionsKévin Petit
2015-03-13Initialise cpu ops after enabling data cacheVikram Kanigiri
2015-03-05Fix violations to the coding styleSandrine Bailleux
2015-02-12Export maximum affinity using PLATFORM_MAX_AFFLVL macroSoby Mathew
2015-01-26Call reset handlers upon BL3-1 entry.Yatharth Kochar
2015-01-26Verify capabilities before handling PSCI callsSoby Mathew
2015-01-26Implement PSCI_FEATURES APISoby Mathew
2015-01-26Rework the PSCI migrate APIsSoby Mathew
2015-01-23Return success if an interrupt is seen during PSCI CPU_SUSPENDSoby Mathew
2015-01-23Validate power_state and entrypoint when executing PSCI callsSoby Mathew
2015-01-23Save 'power_state' early in PSCI CPU_SUSPEND callSoby Mathew
2015-01-23Rework internal API to save non-secure entry point infoSoby Mathew
2015-01-23PSCI: Check early for invalid CPU state during CPU ONSoby Mathew
2015-01-23Remove `ns_entrypoint` and `mpidr` from parameters in pm_opsSoby Mathew
2015-01-22Remove coherent memory from the BL memory mapsSoby Mathew
2015-01-22Move bakery algorithm implementation out of coherent memorySoby Mathew
2015-01-13Invalidate the dcache after initializing cpu-opsSoby Mathew
2014-12-12Fix CPU_SUSPEND when invoked with affinity level higher than get_max_afflvl()Soby Mathew
2014-12-04Fix the array size of mpidr_aff_map_nodes_t.Soby Mathew
2014-08-20Add CPU specific power management operationsSoby Mathew
2014-08-19Miscellaneous PSCI code cleanupsAchin Gupta
2014-08-19Add APIs to preserve highest affinity level in OFF stateAchin Gupta
2014-08-19Rework state management in the PSCI implementationAchin Gupta
2014-08-19Add PSCI service specific per-CPU dataAchin Gupta
2014-08-19Add support for PSCI SYSTEM_OFF and SYSTEM_RESET APIsJuan Castillo
2014-08-15Unmask SError interrupt and clear SCR_EL3.EA bitAchin Gupta
2014-07-31Optimize EL3 register state stored in cpu_context structureSoby Mathew
2014-07-28Simplify management of SCTLR_EL3 and SCTLR_EL1Achin Gupta
2014-07-28Remove the concept of coherent stacksAchin Gupta
2014-07-19Remove coherent stack usage from the warm boot pathAchin Gupta
2014-07-19Make enablement of the MMU more flexibleAchin Gupta
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