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2019-08-29rcar_get3: drivers: ddr: Partly unify register macros between DDR A and BMarek Vasut
The ddr_a and ddr_b register macros are the same for the most part, unify them into a single header. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Change-Id: I8f55d6d779837215339ac0010e8c8ab5f6748d75
2019-08-29rcar_get3: drivers: ddr: Clean up common codeMarek Vasut
Do minor coding style changes to the common DDR init code to make it checkpatch compliant and move macros out into rcar_def.h. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Change-Id: I67eadf8099e4ff8702105c9e07b13f308d9dbe3d
2019-08-16rcar_gen3: plat: Rename RCAR_PRODUCT_* to PRR_PRODUCT_*Marek Vasut
Rename RCAR_PRODUCT_* to PRR_PRODUCT_* and drop the duplicate RCAR_PRODUCT_* macro. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Change-Id: I6b2789790b85edb79c026f0860d70f323d113d96
2019-08-16rcar_gen3: plat: Factor out PRR_ macros into rcar_def.hMarek Vasut
Pull out the PRR_* macros into rcar_def.h and remove multiple copies of it. Now that there are still RCAR_* macros in rcar_def.h too and they have the exact same meaning as the PRR_* macros, but that's for another patch. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Change-Id: Icb7f61b971b1a23102bd1b9f58cda580660a55fc
2019-08-01Replace __ASSEMBLY__ with compiler-builtin __ASSEMBLER__Julius Werner
NOTE: __ASSEMBLY__ macro is now deprecated in favor of __ASSEMBLER__. All common C compilers predefine a macro called __ASSEMBLER__ when preprocessing a .S file. There is no reason for TF-A to define it's own __ASSEMBLY__ macro for this purpose instead. To unify code with the export headers (which use __ASSEMBLER__ to avoid one extra dependency), let's deprecate __ASSEMBLY__ and switch the code base over to the predefined standard. Change-Id: Id7d0ec8cf330195da80499c68562b65cb5ab7417 Signed-off-by: Julius Werner <jwerner@chromium.org>
2019-07-16Merge changes from topic "jc/shift-overflow" into integrationSoby Mathew
* changes: Enable -Wshift-overflow=2 to check for undefined shift behavior Update base code to not rely on undefined overflow behaviour Update hisilicon drivers to not rely on undefined overflow behaviour Update synopsys drivers to not rely on undefined overflow behaviour Update imx platform to not rely on undefined overflow behaviour Update mediatek platform to not rely on undefined overflow behaviour Update layerscape platform to not rely on undefined overflow behaviour Update intel platform to not rely on undefined overflow behaviour Update rockchip platform to not rely on undefined overflow behaviour Update renesas platform to not rely on undefined overflow behaviour Update meson platform to not rely on undefined overflow behaviour Update marvell platform to not rely on undefined overflow behaviour
2019-07-12rcar_gen3: plat: Update IPL and Secure Monitor Rev2.0.4Toshiyuki Ogasahara
Update the revision number in the revision management file. Signed-off-by: Toshiyuki Ogasahara <toshiyuki.ogasahara.bo@hitachi.com> Signed-off-by: Yoshifumi Hosoya <yoshifumi.hosoya.wj@renesas.com> Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Change-Id: I94acd1bb53d9d2453e550e2a13b6391b9088ff8d
2019-07-11Update renesas platform to not rely on undefined overflow behaviourJustin Chadwell
This consists of ensuring that the left operand of each shift is unsigned when the operation might overflow into the sign bit. Change-Id: I51278beacbe6da79853c3f0f0f94cd806fc9652c Signed-off-by: Justin Chadwell <justin.chadwell@arm.com>
2019-06-22rcar_gen3: drivers: pfc: Move PFC drivers out of stagingMarek Vasut
Now that PFC drivers are cleaned up , move them out of staging. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Change-Id: Ie594b53558c2bfb8e5d88e5b0354752c17a2487e
2019-06-17rcar_gen3: drivers: qos: Move QoS drivers out of stagingMarek Vasut
Now that QoS drivers are cleaned up , move them out of staging. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Change-Id: If61ab2157c30b8f5a6b91d2c56ddbb9098ef99e8
2019-06-14rcar_gen3: console: Convert to multi-console APIMarek Vasut
Convert the R-Car Gen3 platform and both SCIF and Log drivers to multi-console API. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Change-Id: I18556973937d150b60453f9150d54ee612571e35
2019-04-11rcar_gen3: plat: Update IPL and Secure Monitor Rev2.0.3Toshiyuki Ogasahara
Update the revision number in the revision management file. Signed-off-by: Toshiyuki Ogasahara <toshiyuki.ogasahara.bo@hitachi.com> Signed-off-by: Yoshifumi Hosoya <yoshifumi.hosoya.wj@renesas.com> Change-Id: If8918efad0fcbe6f91b66c0c7438406b1d4fb759
2019-04-11rcar_gen3: drivers: Change to restore timer counter value at resumeToshiyuki Ogasahara
Changed to save and restore cntpct_el0 using memory mapped register for generic timer when System Suspend and Resume. Reported by: Volodymyr Babchuk <volodymyr_babchuk@epam.com> Signed-off-by: Toshiyuki Ogasahara <toshiyuki.ogasahara.bo@hitachi.com> Signed-off-by: Yoshifumi Hosoya <yoshifumi.hosoya.wj@renesas.com> Change-Id: I40fd9f5434c4d52b320cd1d20322b9b8e4e67155
2019-04-11rcar_gen3: plat: Update IPL and Secure Monitor Rev2.0.2Toshiyuki Ogasahara
Update the revision number in the revision management file. Signed-off-by: Toshiyuki Ogasahara <toshiyuki.ogasahara.bo@hitachi.com> Signed-off-by: Yoshifumi Hosoya <yoshifumi.hosoya.wj@renesas.com> Change-Id: I239f4d9f58d38515a49fa1a22cece48b59710d15
2019-04-11rcar_gen3: plat: Change periodic write DQ training option.Toshiyuki Ogasahara
Periodic write DQ training available as default. Signed-off-by: Toshiyuki Ogasahara <toshiyuki.ogasahara.bo@hitachi.com> Signed-off-by: Yoshifumi Hosoya <yoshifumi.hosoya.wj@renesas.com> Change-Id: I649cfe538e4e2c7e19145ce7d1938ce4361b2529
2019-04-02rcar_gen3: plat: Add R-Car V3M supportValentine Barshak
Add R-Car V3M support. This is based on the original V3M support patch for Yocto v2.23.1 by Vladimir Barinov. Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com> Signed-off-by: Valentine Barshak <valentine.barshak@cogentembedded.com> Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> --- Marek: Update on top of mainline ATF/master
2019-04-02rcar_gen3: plat: Add initial D3 supportMarek Vasut
Add R-Car D3 SoC platform specifics. Driver, PFC, QoS, DDR init code will be added separately. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2019-04-02rcar_gen3: plat: Print DRAM bank size in MiB if below 1 GiBMarek Vasut
Print the DRAM bank size in MiB instead of GiB in case the bank size is smaller than 1 GiB. This prevents printing zeroes on systems with small DRAM sizes. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2019-03-27rcar_gen3: plat: Set M3W ULCB DRAM size to 2 GiBMarek Vasut
The M3W ULCB board has 2 GiB of DRAM, set it so. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2019-03-04rcar_gen3: Add M3-W 3.0 supportMarek Vasut
Add support for the M3W 3.0 SoC and synchronize the upstream ATF with Renesas downstream ATF release v2.0.1. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2019-02-20rcar_gen3: plat: Prevent PCIe hang during L1X config accessMarek Vasut
In case the PCIe controller receives a L1_Enter_PM DLLP, it will disable the internal PLLs. The system software cannot predict it and can attempt to perform device config space access across the PCIe link while the controller is in this transitional state. If such condition happens, the PCIe controller register access will trigger ARM64 SError exception. This patch adds checks for which PCIe controller is enabled, checks whether the PCIe controller is in such a transitional state and if so, first completes the transition and then restarts the instruction which caused the SError. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2019-02-01Remove unneeded include paths in PLAT_INCLUDESAntonio Nino Diaz
Also, update platform_def.h guidelines about includes in the porting guide. Change-Id: I1ae338c9dd3242b309f6d53687ba2cb755d488c3 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
2019-01-29rcar_gen3: plat: Add missing cpu_on_check() implementationMarek Vasut
The ATF code fails to build with PMIC_ROHM_BD9571=0, add the missing function into the PWRC code. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2019-01-29rcar_gen3: plat: Allow E3 auto-detectionMarek Vasut
Allow auto-detecting E3 when RCAR_LSI is set to RCAR_AUTO. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2019-01-29rcar_gen3: plat: Drop unused macroMarek Vasut
The macro is not used, drop it. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2019-01-29Revert "rcar_gen3: plat: Enable programmable CPU reset address"Marek Vasut
This reverts commit d48536e2f92d47ebb92cf12b35133c3be2d0e459, which misbehaves on R-Car H3 ES2.0. Until the reason for that misbehavior is understood, revert the commit. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2019-01-08rcar_gen3: plat: update renesas version to 2.0.0Marek Vasut
Update the reported Renesas version to 2.0.0, since the DDR/QoS/PFC table versions match the ones from that release. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2019-01-08rcar_gen3: drivers: pwrc: Switch to common delay implementationMarek Vasut
Replace the ad-hoc implementation of delay in PWRC driver with common R-Car delay code. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2019-01-08rcar_gen3: drivers: delay: Rewrite from assembler to CMarek Vasut
Rewrite the delay code from assembler to C. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2019-01-08rcar_gen3: plat: Add generic timer initMarek Vasut
Add code to determine the platform timer frequency and configure the generic timer accordingly early in BL2. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2019-01-08rcar_gen3: drivers: cpld: Move rcar_cpld_reset_cpu() into headerMarek Vasut
Move the rcar_cpld_reset_cpu() function into header file and zap the externs. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2019-01-08rcar_gen3: plat: Dump EL3 interrupt error registersMarek Vasut
Since the interrupts are handled in EL3, dump the EL3 error registers in case an error happens. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2019-01-08rcar_gen3: plat: Enable programmable CPU reset addressMarek Vasut
The reset address is programmable on the R-Car Gen3, enable it. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2019-01-08rcar_gen3: plat: Disable IPMMU PV0 cache on E3Marek Vasut
Disable the IPMMU PV0 cache on E3 rev. 1.x . Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2019-01-08rcar_gen3: plat: Add E3 rev. 1.1 supportMarek Vasut
Add support for R-Car E3 silicon rev. 1.1 Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2019-01-08rcar_gen3: plat: Add missing platform auto-detection nameMarek Vasut
Add missing TARGET_NAME for the case where RCAR_LSI is set to AUTO, which is platform auto-detection. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2019-01-08rcar_gen3: plat: Clean up rcar_pwrc_code_copy_to_system_ram()Marek Vasut
Call the function only from architecture setup and at the end of suspend cycle instead of calling it all over the place. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2019-01-08rcar_gen3: plat: Fix BL2 size checkMarek Vasut
Rename BL2_LIMIT to BL2_IMAGE_LIMIT and BL2_SYSRAM_LIMIT to BL2_LIMIT to correctly set BL2_LIMIT value. Set correct DEVICE_SRAM_BASE to match the hardware. Use BL2_END in rcar_configure_mmu_el3() to mark the cacheable BL2 area. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2019-01-08rcar_gen3: plat: Staticize memory mapsMarek Vasut
Staticize the platform memory map tables as they are only used within the platform_common.c file. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2019-01-08rcar_gen3: plat: Function cleanupMarek Vasut
Replace foo_t with struct foo. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2019-01-08rcar_gen3: plat: Fix cache line sizeMarek Vasut
The CPU has cache line size of 64 Bytes, fix the cache line size. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2019-01-08rcar_gen3: plat: Disable SVEMarek Vasut
Apply 3872fc2d1fc5 ("Do not enable SVE on pre-v8.2 platforms") to R-Car Gen3 too. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2019-01-08rcar_gen3: plat: Add missing dependency to rcar_srecordMarek Vasut
Add missing dependency on the bl2.elf and bl31.elf into the rcar_srecord target, which uses those ELF files to generate the SRECs. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2019-01-08rcar_gen3: plat: Rename H3 labelMarek Vasut
Rename the H3 label to avoid confusing clang, which generates an error if the label is just H3. Rename it to RCARH3. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2019-01-04Sanitise includes across codebaseAntonio Nino Diaz
Enforce full include path for includes. Deprecate old paths. The following folders inside include/lib have been left unchanged: - include/lib/cpus/${ARCH} - include/lib/el3_runtime/${ARCH} The reason for this change is that having a global namespace for includes isn't a good idea. It defeats one of the advantages of having folders and it introduces problems that are sometimes subtle (because you may not know the header you are actually including if there are two of them). For example, this patch had to be created because two headers were called the same way: e0ea0928d5b7 ("Fix gpio includes of mt8173 platform to avoid collision."). More recently, this patch has had similar problems: 46f9b2c3a282 ("drivers: add tzc380 support"). This problem was introduced in commit 4ecca33988b9 ("Move include and source files to logical locations"). At that time, there weren't too many headers so it wasn't a real issue. However, time has shown that this creates problems. Platforms that want to preserve the way they include headers may add the removed paths to PLAT_INCLUDES, but this is discouraged. Change-Id: I39dc53ed98f9e297a5966e723d1936d6ccf2fc8f Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
2018-12-13plat: rcar: Move FDT from x3 to x1Marek Vasut
As suggested, pass the FDT to BL 33 via x1 instead of x3 , to be consistent with the other platforms. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2018-12-06plat: rcar: Generate FCNL reserved memory nodeMarek Vasut
Generate a /reserved-memory node for FCNL in the DT passed to subsequent stages, so they will know how the FCNL is configured. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2018-12-06plat: rcar: Generate platform compatible stringMarek Vasut
Generate /compatible string for the platform, so that the subsequent stages know which platform they are running on. This could be useful when ie. building U-Boot that contains DTs for multiple platforms and can thus decide on which platform it is running. This would ultimately allow single bootloader binary for all Gen3 platforms. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2018-12-06plat: rcar: Pass DTB with DRAM layout from BL2 to next stagesMarek Vasut
Pass DTB containing DRAM layout from BL2 to BL33 via register x3, so that the BL33 can simply consume it and get accurate DRAM layout info. BL33 is in most usecases U-Boot. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2018-12-06plat: rcar: Use array in the DRAM size reportingMarek Vasut
Use array of start-size tuples for the DRAM banks and call single function which iterates over this array to report the DRAM info. This is in preparation for expanding this to generate FDT for the next stage. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
generated by cgit v1.2.3 (git 2.0.4) at 2024-05-23 13:53:13 +0000