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path: root/plat/nvidia/tegra/soc
AgeCommit message (Expand)Author
2017-03-23Tegra186: enable support for simulation environmentVarun Wadekar
2017-03-23Tegra186: check MCE firmware version during bootVarun Wadekar
2017-03-23Tegra186: fix programming sequence for SC7/SC8 entryVarun Wadekar
2017-03-23Tegra186: program default core wake mask during CPU_SUSPENDVarun Wadekar
2017-03-23Tegra186: clear the system cstate for offline coreVarun Wadekar
2017-03-23Tegra186: mce: enable LATIC for chip verificationVarun Wadekar
2017-03-23Tegra186: save/restore BL31 context to/from TZDRAMVarun Wadekar
2017-03-23Tegra186: re-configure MSS' client settingsVarun Wadekar
2017-03-22Tegra186: implement support for System SuspendVarun Wadekar
2017-03-22Tegra186: smmu: driver for the smmu hardware blockVarun Wadekar
2017-03-20Tegra186: implement quasi power off (SC8) stateVarun Wadekar
2017-03-20Tegra186: disable DCO operations for PSCI_CPU_OFFVarun Wadekar
2017-03-20Tegra186: register FIQ interrupt sourcesVarun Wadekar
2017-03-20Tegra: memctrl_v2: check GPU state before VPR programmingVarun Wadekar
2017-03-20Tegra186: fix per-cpu wake times for CPU power statesVarun Wadekar
2017-03-20Tegra186: add Video memory carveout settingsVarun Wadekar
2017-03-20Tegra186: support for C6/C7 CPU_SUSPEND statesVarun Wadekar
2017-03-20Tegra186: support for the latest platform port handlersVarun Wadekar
2017-03-20Tegra186: implement prepare_system_reset handlerVarun Wadekar
2017-03-20Tegra186: implement CPU_OFF handlerVarun Wadekar
2017-03-20Tegra186: update SYSCNT_FREQ to 31.25MHzVarun Wadekar
2017-03-20Tegra186: relocate bl31.bin to the SYSRAMVarun Wadekar
2017-03-20Tegra186: implement prepare_system_off handlerVarun Wadekar
2017-03-20Tegra186: power on/off secondary CPUsVarun Wadekar
2017-03-20Tegra186: SiP calls to interact with the MCE driverVarun Wadekar
2017-03-20Tegra186: mce: driver for the CPU complex power manager blockVarun Wadekar
2017-03-20Tegra186: platform support for Tegra "T186" SoCVarun Wadekar
2017-03-20plat/tegra: Enable Cortex-A53 erratum 855873 workaroundAndre Przywara
2017-03-07Tegra210: enable errata for Cortex-A57 and Cortex-A53 CPUsVarun Wadekar
2017-03-02Tegra210: assert if afflvl0/1 have incorrect state-idsHarvey Hsieh
2017-03-02Tegra210: new TZDRAM base addressVarun Wadekar
2017-03-02Tegra210: set core power state during cluster power downVarun Wadekar
2017-02-28Tegra: GIC: enable FIQ interrupt handlingVarun Wadekar
2017-02-23Tegra: allow individual SoCs to restore their settingsVarun Wadekar
2017-02-23cpus: denver: disable DCO operations from platform codeVarun Wadekar
2017-02-23Tegra: enable PSCI extended state ID processingVarun Wadekar
2017-02-23Tegra: handlers for common and SoC-specific SiP callsVarun Wadekar
2017-02-22Tegra: init normal/crash console for platformsVarun Wadekar
2017-02-22Tegra: Memory Controller Driver (v1)Varun Wadekar
2017-02-21Tegra: enable processor retention and L2/CPUECTLR accessVarun Wadekar
2017-02-21Tegra: define MAX_XLAT_TABLES and MAX_MMAP_REGIONS per-platformVarun Wadekar
2017-02-21Tegra: SoC specific SiP handlersVarun Wadekar
2017-02-21Tegra: include flowctlr driver from SoC specific makefilesVarun Wadekar
2016-05-20Implement plat_get_syscnt_freq2 on platformsAntonio Nino Diaz
2016-04-21Move `plat_get_syscnt_freq()` to arm_common.cYatharth Kochar
2015-12-04Tegra: remove support for legacy platform APIsVarun Wadekar
2015-11-10Tegra: introduce per-soc system reset handlerVarun Wadekar
2015-08-24Tegra210: wait for 512 timer ticks before retention entryVarun Wadekar
2015-07-31Tegra132: set TZDRAM_BASE to 0xF5C00000Varun Wadekar
2015-07-27Tegra210: enable WRAP to INCR burst type conversionsVarun Wadekar