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32bit. So we use [32:1] as the configuration value
Signed-off-by: Olivier Masse <olivier.masse@nxp.com>
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setup
Signed-off-by: Olivier Masse <olivier.masse@nxp.com>
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Signed-off-by: Olivier Masse <olivier.masse@nxp.com>
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For i.MX8MM low power audio playback, when Linux suspend,
M4 still needs to be active for audio playback, so system
can NOT enter DSM mode but only force A core platform into
STOP mode, PLLs/NoC/DRAM need to be active as well and MU
interrupt wakeup needs to be enabled for waking up Linux
by MU message sent by M4.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Signed-off-by: Bai Ping <ping.bai@nxp.com>
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csu_rdc test in ATF makes use of GPIO 4 and 5. Unfortunatly GPIO5 is
being used by u-boot. This is why u-boot crashes.
Changing the peripherals to protect, instead of gpio4 and 5, use csu
and rdc registers instead.
Signed-off-by: Silvano di Ninno <silvano.dininno@nxp.com>
Signed-off-by: Franck LENORMAND <franck.lenormand@nxp.com>
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Enable the power domain support on imx8mm.
Signed-off-by: Bai Ping <ping.bai@nxp.com>
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All the DRAM timing related config is saved by SPL in OCRAM_S,
so no need to do save for these configs in ATF anymore.
Signed-off-by: Bai Ping <ping.bai@nxp.com>
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The debug version of TF-A has below assert, fix
it by making sure no memory map overlap.
ASSERT: lib/xlat_tables/xlat_tables_common.c:129
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
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Switch to MULTI_CONSOLE_API to make debug UART work.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
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re-design the dram power management code to make it more
common for all i.MX8M SOCs. code need to refact and optimize
to make more better. Using this common code on i.MX8MM first,
for i.MX8MQ, will move to this later.
Signed-off-by: Bai Ping <ping.bai@nxp.com>
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Switch the CKIL clock source to 32K OSC. On i.MX8MM,
after SOC PoR, the default clock source for CKIL is from
divided 24MHz OSC, as 24MHz OSC will be power down when
system enters DSM mdoe. So it is better to use 32K OSC
as the default clock source after system bootup.
Signed-off-by: Bai Ping <ping.bai@nxp.com>
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- configure Secure memory partition
- allocate all CAAM JR to Linux
Signed-off-by: Silvano di Ninno <silvano.dininno@nxp.com>
Reviewed-by: Aymen Sghaier <aymen.sghaier@nxp.com>
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move CSU and RDC driver to common/i.mx8m folder
and enable the driver for i.mx8mm
Signed-off-by: Silvano di Ninno <silvano.dininno@nxp.com>
Reviewed-by: Aymen Sghaier <aymen.sghaier@nxp.com>
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fix entry point for the OP-TEE
Signed-off-by: Silvano di Ninno <silvano.dininno@nxp.com>
Reviewed-by: Aymen Sghaier <aymen.sghaier@nxp.com>
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Enable the WAIT mode support in cpuilde to save power.
Signed-off-by: Bai Ping <ping.bai@nxp.com>
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Similar to imx8mq, the U-boot calls SIP call for HAB interfaces, and trap to ATF
to run the HAB.
Since HAB codes locates in ROM, and need to access OCRAM, CAAM RAM and DDR to
authenticate image. Add these relevant memory region to MMU. Also extend the
stack size of each core to avoid stack overflow, and extend the BL31 limit
to OCRAM end 0x940000.
Signed-off-by: Ye Li <ye.li@nxp.com>
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i.MX8MM is a new soc of the i.MX8M family, this patch
add the basic support for i.MX8MM. further code optimization
needed. WAIT mode support is currently disabled, will be enabled
later.
Signed-off-by: Bai Ping <ping.bai@nxp.com>
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