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path: root/plat/imx/imx8m/imx8mq/include
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2020-05-14MLK-23930-1 plat: imx8mq: cleanup csu and rdc implementationSilvano di Ninno
Align CSU CSL defines with the rest of the imx8m family Compile csu and rdc drivers. Signed-off-by: Silvano di Ninno <silvano.dininno@nxp.com> (cherry picked from commit 5e705b7aa02b6f9c969c1febe7fcaed2940ebaca)
2020-04-17MLK-23803 plat: imx8mq: Get the system counter freq from hw regJacky Bai
On i.Mx8MQ, the actual system counter freq is 8333333Hz, have some trailing part, so get the actual freq from the system counter module register. Signed-off-by: Jacky Bai <ping.bai@nxp.com> Reviewed-by: Anson Huang <Anson.Huang@nxp.com>
2020-04-08MLK-23752 plat: imx8m: Update the src gpr used for imx8mp lpaNitin Garg
Fix build break for iMX8MQ. Signed-off-by: Nitin Garg <nitin.garg@nxp.com>
2020-04-07MLK-23727 imx8mp/n: support stop M7Peng Fan
Support stop M7 with SIP call. Per IC team, to rekick M7 need follow steps. If M7 already in WFI, perform below steps. a) Set [0x303A_002C].0=0 [ request SLEEPHOLDREQn ] b) Wait [0x303A_00EC].1 = 0 [ wait SLEEPHOLDACKn ] c) Set GPR.CPUWAIT=1 d) Set [0x303A_002C].0=1 [ de-assert SLEEPHOLDREQn ] e) Set SRC_M7_RCR[3:0] = 0xE0 [ reset M7 core/plat ] f) Wait SRC_M7_RCR[3:0] = 0x8 g) Init TCM or DDR h) Set GPR.INITVTOR i) Set GPR.CPUWAIT=0, M7 starting running Add a timeout check, if timeout, still perform force reset, in this way no need to rely on M7 team's image wfi support ready. Return a1,a2 to caller to check timeout or reset fail. Reviewed-by: Jacky Bai <ping.bai@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-03-31plat: imx8m: Fix the m4 enabled check for imx8mJacky Bai
On i.MX8MN & i.MX8MP, the M core enabled check should relay on the IOMUX GPR CPU_WAIT bit, when this bit is cleared, it means M core is active & running, so refine the m4 enabled check method. Signed-off-by: Jacky Bai <ping.bai@nxp.com>
2020-03-27plat: imx8m: move the gpc reg & macro to a separate header fileJacky Bai
move the gpc reg offset, bit define & macro to a separate header file for code reuse. Signed-off-by: Jacky Bai <ping.bai@nxp.com>
2020-03-27TEE-532-4: plat: imx8mq: add optee supportSilvano di Ninno
Port and cleanup OP-TEE support. Signed-off-by: Silvano di Ninno <silvano.dininno@nxp.com>
2020-03-09MA-14173 Enable trusty for imx8mqJi Luo
Add trusty support for imx8mq, default load address and size for trusty os will be 0xfe000000 and 0x2000000. Signed-off-by: Ji Luo <ji.luo@nxp.com> (cherry picked from a708794ccde53d8253a74ff578ca9d5258971690)
2020-03-03plat: imx8m: add enum type for RDC/CSU indexJacky Bai
Signed-off-by: Jacky Bai <ping.bai@nxp.com>
2020-02-09plat: imx8m: Add the M4 low power audio support on imx8mJacky Bai
Add the M core low power audio support on i.MX8M. Signed-off-by: Jacky Bai <ping.bai@nxp.com>
2020-02-09plat: imx8m: Add the src handler for m4/m7 core boot supportJacky Bai
Add the SRC SiP handler for M4/M7 boot support on i.MX8M SoC. Signed-off-by: Jacky Bai <ping.bai@nxp.com>
2020-02-09plat: imx8m: Add hab suport on imx8m SoC familyJacky Bai
Add the HAB secure boot support for the i.MX8M SoC family. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Jacky Bai <ping.bai@nxp.com>
2020-02-09plat: imx8mq: Add the dram retention support for imx8mqJacky Bai
Add the dram retention support for i.MX8MQ. As there is no enough ocram space available before entering TF-A, so the timing info need to be copied from dram into ocram. Signed-off-by: Jacky Bai <ping.bai@nxp.com>
2019-12-13plat: imx8mm: Add the support for opteed spd on imx8mq/imx8mmJacky Bai
Add the basic support for opteed SPD on imx8mq & imx8mm. Signed-off-by: Jacky Bai <ping.bai@nxp.com> Change-Id: I6c4855c89dea78d13d172c3d86cf047f829e51ce
2019-07-04plat: imx8m: Add caam module init on imx8mJacky Bai
CAAM module must be initialized in secure world before it can be used in non-secure world. Change-Id: I042893667ddef99d8b6fc3902847d516d8591996 Signed-off-by: Jacky Bai <ping.bai@nxp.com>
2019-05-20imx8: Replace PLAT_IMX8* with automatic PLAT_imx8*Leonard Crestez
Platform defines are already provided by the build system so let's not duplicate them. Change-Id: Icf1ea76c3c3213e27b447c95e2b22b961fa7693e Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com>
2019-05-20plat: imx8mq: Implement IMX_SIP_GET_SOC_INFOLeonard Crestez
The manual documents that 0x3036006c should contains the soc revision for imx8mq but this always reports A0. Work around this by parsing the ROM header and checking if OCOTP register 0x40 is stuck at 0xff0055aa. Determining this inside TF-A makes life easier for OS, see for example this linux discussion: https://lkml.org/lkml/2019/5/3/465 The soc revision can also be useful inside TF-A itself, for example for the non-upstream DDR DVFS "busfreq" feature is affected by 8mq erratas. The clock for OCOTP block can be disabled by OS so only initialize soc revision once at boot time. Change-Id: I9ca3f27840229ce8a28b53870e44da29f63c73aa Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com>
2019-03-12plat: imx8m: refactor the code to make it reusableJacky Bai
for the i.MX8M SOCs, part of the code for gpc and PSCI implementation can be reused and make it common for all these SoCs. this patch extracts the common part for reuse. Signed-off-by: Jacky Bai <ping.bai@nxp.com>
2019-02-22imx: Configure CAAM job rings master ID for i.MX8MQChris Spencer
For i.MX8MQ B0 revision the default configuration of JRaMID is not valid to allow the kernel to use the CAAM job rings. This patch sets the master ID of the Cortex A in the JRaMID registers. Signed-off-by: Chris Spencer <christopher.spencer@sea.co.uk>
2018-12-05plat: imx: Add i.MX8MQ basic supportBai Ping
i.MX8MQ is new SOC of NXP's i.MX8M family based on A53. It can provide industry-leading audio, voice and video processing for applications that scale from consumer home audio to industrial building automation and mobile computers this patchset add the basic supoort to boot up the 4 X A53. more feature will be added later. Signed-off-by: Bai Ping <ping.bai@nxp.com>
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