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path: root/plat/imx/imx8m/imx8mm
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2020-05-14MLK-23930-2 plat: imx8m: Add csu and rdc testimx_5.4.24_2.1.0Silvano di Ninno
re-enable csu and rdc test for use of the test team only enable if CSU_RDC_TEST is defined. Signed-off-by: Silvano di Ninno <silvano.dininno@nxp.com> (cherry picked from commit 2eb979f144f1c008f64d4550035ece0ad69a2365)
2020-04-27MLK-23857 imx8mm/mn/mp: Fix DRAM MMU attribute to non-secure for HABYe Li
DRAM MMU settings miss the MT_NS on iMX8MM/MN/MP, this breaks the HAB function since we load image by u-boot in NS mode and authenticate it in ATF. Without MT_NS, ATF access secure memory which is different cacheline with non-secure memory. Signed-off-by: Ye Li <ye.li@nxp.com> Reviewed-by: Jacky Bai <ping.bai@nxp.com>
2020-04-07MLK-23752 plat: imx8m: Update the src gpr used for imx8mp lpaJacky Bai
On i.MX8MP, the SRC GPR9(0x94) is used by memory repair, so choose SRC GPR10(0x98) as the LPA status sync register. Add use '==' instead of '&' for LPA active statue check. Signed-off-by: Jacky Bai <ping.bai@nxp.com> Reviewed-by: Anson Huang <Anson.Huang@nxp.com>
2020-04-07MLK-23727 imx8mp/n: support stop M7Peng Fan
Support stop M7 with SIP call. Per IC team, to rekick M7 need follow steps. If M7 already in WFI, perform below steps. a) Set [0x303A_002C].0=0 [ request SLEEPHOLDREQn ] b) Wait [0x303A_00EC].1 = 0 [ wait SLEEPHOLDACKn ] c) Set GPR.CPUWAIT=1 d) Set [0x303A_002C].0=1 [ de-assert SLEEPHOLDREQn ] e) Set SRC_M7_RCR[3:0] = 0xE0 [ reset M7 core/plat ] f) Wait SRC_M7_RCR[3:0] = 0x8 g) Init TCM or DDR h) Set GPR.INITVTOR i) Set GPR.CPUWAIT=0, M7 starting running Add a timeout check, if timeout, still perform force reset, in this way no need to rely on M7 team's image wfi support ready. Return a1,a2 to caller to check timeout or reset fail. Reviewed-by: Jacky Bai <ping.bai@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-03-31plat: imx8m: Fix the m4 enabled check for imx8mJacky Bai
On i.MX8MN & i.MX8MP, the M core enabled check should relay on the IOMUX GPR CPU_WAIT bit, when this bit is cleared, it means M core is active & running, so refine the m4 enabled check method. Signed-off-by: Jacky Bai <ping.bai@nxp.com>
2020-03-27plat: imx8m: move the gpc reg & macro to a separate header fileJacky Bai
move the gpc reg offset, bit define & macro to a separate header file for code reuse. Signed-off-by: Jacky Bai <ping.bai@nxp.com>
2020-03-27plat: imx8mm: Update the cpu core power up timingJacky Bai
Updating the CPU CORE power up timing to make sure the RDC reload is done before CPU start to run code in OCRAM space. Signed-off-by: Jacky Bai <ping.bai@nxp.com>
2020-03-27plat: imx8mq/mm/mn: Cleanup bl31_setupSilvano di Ninno
Align code style between 8mq, 8mm and 8mn files. Signed-off-by: Silvano di Ninno <silvano.dininno@nxp.com>
2020-03-27TEE-532-2: plat: imx8mm: add optee supportSilvano di Ninno
Port and cleanup OP-TEE support. Signed-off-by: Silvano di Ninno <silvano.dininno@nxp.com>
2020-03-09MA-13758 Enable Trusty OS on imx8mmJi Luo
Add trusty support for imx8mm, default load address and size of trusty are 0xbe000000 anx 0x2000000. Signed-off-by: Ji Luo <ji.luo@nxp.com> (cherry picked from commit 28d3f0fa26ff11efb98281ed603b6f44cea3c6c5)
2020-03-09MA-16438 plat:imx8/imx8m: switch to xlat_tables_v2Ji Luo
spd trusty requires memory dynamic mapping feature to be enabled, so we have to use xlat table library v2 instead of v1. Test: builds. Signed-off-by: Ji Luo <ji.luo@nxp.com>
2020-03-03plat: imx8m: Replace the magic number rdc/csu index with enum typeJacky Bai
Replace the magic number index with enum type to make RDC/CSU config more clear for user. Signed-off-by: Jacky Bai <ping.bai@nxp.com>
2020-03-03plat: imx8m: add enum type for RDC/CSU indexJacky Bai
Signed-off-by: Jacky Bai <ping.bai@nxp.com>
2020-02-09plat: imx8m: Add the M4 low power audio support on imx8mJacky Bai
Add the M core low power audio support on i.MX8M. Signed-off-by: Jacky Bai <ping.bai@nxp.com>
2020-02-09plat: imx8m: Enable the noc power down support on imx8mJacky Bai
Enable the NOC wrapper power down support for SoC that have switchable NOC power domain. Signed-off-by: Jacky Bai <ping.bai@nxp.com>
2020-02-09plat: imx8m: Add the src handler for m4/m7 core boot supportJacky Bai
Add the SRC SiP handler for M4/M7 boot support on i.MX8M SoC. Signed-off-by: Jacky Bai <ping.bai@nxp.com>
2020-02-09plat: imx8m: Add hab suport on imx8m SoC familyJacky Bai
Add the HAB secure boot support for the i.MX8M SoC family. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Jacky Bai <ping.bai@nxp.com>
2020-02-09plat: imx8mm: Enable the csu init on imx8mmJacky Bai
Enable the CSU init on imx8mm. The 'csu_cfg' array is just a placeholder for now as example. In real use case, user can add the CSU config as needed based on system design. Signed-off-by: Jacky Bai <ping.bai@nxp.com>
2020-02-09plat: imx8m: Keep pu domains in default state during boot stageJacky Bai
No need to keep all PU domains on as the full power domain driver support has been added. Signed-off-by: Jacky Bai <ping.bai@nxp.com>
2020-01-03plat: imx8m: Add the PU power domain support on imx8mm/mnJacky Bai
Add the PU power domain support for imx8mm/mn. Signed-off-by: Jacky Bai <ping.bai@nxp.com>
2019-12-13plat: imx8m: Add the ddr frequency change support for imx8m familyJacky Bai
Add the DDR frequency change support. Signed-off-by: Jacky Bai <ping.bai@nxp.com> Change-Id: I84f0ef51b04b84da8ba2cbeca86a07338a4903de
2019-12-13plat: imx8mm: Enable dram retention suuport on imx8mmJacky Bai
Enable dram retention support on i.MX8MM. Change-Id: I76ada615d386602e551d572ff4e60ee19bb8e418 Signed-off-by: Jacky Bai <ping.bai@nxp.com>
2019-12-13plat: imx8mm: Add the support for opteed spd on imx8mq/imx8mmJacky Bai
Add the basic support for opteed SPD on imx8mq & imx8mm. Signed-off-by: Jacky Bai <ping.bai@nxp.com> Change-Id: I6c4855c89dea78d13d172c3d86cf047f829e51ce
2019-07-24plat: imx8m: Add basic rdc module init driverJacky Bai
Add the basic support for RDC init/config driver, this module driver can be enhanced more if necessary. Signed-off-by: Jacky Bai <ping.bai@nxp.com> Change-Id: I290dc378d0d85671435f9de46d5aa790b4e006c8
2019-07-04plat: imx8m: Add caam module init on imx8mJacky Bai
CAAM module must be initialized in secure world before it can be used in non-secure world. Change-Id: I042893667ddef99d8b6fc3902847d516d8591996 Signed-off-by: Jacky Bai <ping.bai@nxp.com>
2019-06-28Remove MULTI_CONSOLE_API flag and references to itAmbroise Vincent
The new API becomes the default one. Change-Id: Ic1d602da3dff4f4ebbcc158b885295c902a24fec Signed-off-by: Ambroise Vincent <ambroise.vincent@arm.com>
2019-05-21plat: imx8m: Add the aipstz init to config peripheral accessJacky Bai
AIPSTZ provide access control for all the peripherals connected to it. In this patch all the perperals are configured accessible to all the master. it can be customized based the actual use case. Signed-off-by: Jacky Bai <ping.bai@nxp.com> Change-Id: I5ef5baa1da6906f13a60923d27ede336c61e319a
2019-05-09plat: imx8m: Implement IMX_SIP_BUILDINFOLeonard Crestez
The IMX_SIP_BUILDINFO call was implemented for imx8qm and imx8qx but it's also applicable to imx8m. This fixes U-Boot not printing commit hash on 8m with upstream TF-A. Change-Id: Idcfd9729eaaccf329c24e241da325f1f6cd3c880 Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com>
2019-04-08plat: imx8m: remove deprecated code includeJacky Bai
The 'drivers/console/aarch64/console.S' is not needed, so remove it from build to fix the build error when 'ERROR_DEPRECATED'set. Change-Id: Id047a355f82fd33298b7e2b49eff289d28eb5b56 Signed-off-by: Jacky Bai <ping.bai@nxp.com>
2019-03-13plat: imx8m: Add the basic support for imx8mmJacky Bai
The i.MX8M Mini is new SOC of the i.MX8M family. it is focused on delivering the latest and greatest video and audio experience combining state-of-the-art media-specific features with high-performance processing while optimized for lowest power consumption. The i.MX 8M Mini Media Applications Processor is 14nm FinFET product of the growing i.MX8M family targeting the consumer & industrial market. It is built in 14LPP to achieve both high performance and low power consumption and relies on a powerful fully coherent core complex based on a quad Cortex-A53 cluster with video and graphics accelerators this patch add the basic support for i.MX8MM. Signed-off-by: Jacky Bai <ping.bai@nxp.com>
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