Age | Commit message (Collapse) | Author |
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On i.MX8MP, the SRC GPR9(0x94) is used by memory repair, so choose
SRC GPR10(0x98) as the LPA status sync register. Add use '==' instead
of '&' for LPA active statue check.
Signed-off-by: Jacky Bai <ping.bai@nxp.com>
Reviewed-by: Anson Huang <Anson.Huang@nxp.com>
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Support stop M7 with SIP call.
Per IC team, to rekick M7 need follow steps.
If M7 already in WFI, perform below steps.
a) Set [0x303A_002C].0=0 [ request SLEEPHOLDREQn ]
b) Wait [0x303A_00EC].1 = 0 [ wait SLEEPHOLDACKn ]
c) Set GPR.CPUWAIT=1
d) Set [0x303A_002C].0=1 [ de-assert SLEEPHOLDREQn ]
e) Set SRC_M7_RCR[3:0] = 0xE0 [ reset M7 core/plat ]
f) Wait SRC_M7_RCR[3:0] = 0x8
g) Init TCM or DDR
h) Set GPR.INITVTOR
i) Set GPR.CPUWAIT=0, M7 starting running
Add a timeout check, if timeout, still perform force reset, in this
way no need to rely on M7 team's image wfi support ready.
Return a1,a2 to caller to check timeout or reset fail.
Reviewed-by: Jacky Bai <ping.bai@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
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On i.MX8MN & i.MX8MP, the M core enabled check should
relay on the IOMUX GPR CPU_WAIT bit, when this bit is
cleared, it means M core is active & running, so refine
the m4 enabled check method.
Signed-off-by: Jacky Bai <ping.bai@nxp.com>
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move the gpc reg offset, bit define & macro to a separate header
file for code reuse.
Signed-off-by: Jacky Bai <ping.bai@nxp.com>
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Port and cleanup OP-TEE support.
Signed-off-by: Silvano di Ninno <silvano.dininno@nxp.com>
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Signed-off-by: Jacky Bai <ping.bai@nxp.com>
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Add the M core low power audio support on i.MX8M.
Signed-off-by: Jacky Bai <ping.bai@nxp.com>
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Add the SRC SiP handler for M4/M7 boot support on i.MX8M SoC.
Signed-off-by: Jacky Bai <ping.bai@nxp.com>
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Add the HAB secure boot support for the i.MX8M SoC family.
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Jacky Bai <ping.bai@nxp.com>
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Add the PU power domain support for imx8mm/mn.
Signed-off-by: Jacky Bai <ping.bai@nxp.com>
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Add the DDR frequency change support.
Signed-off-by: Jacky Bai <ping.bai@nxp.com>
Change-Id: I84f0ef51b04b84da8ba2cbeca86a07338a4903de
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Enable dram retention support on i.MX8MM.
Change-Id: I76ada615d386602e551d572ff4e60ee19bb8e418
Signed-off-by: Jacky Bai <ping.bai@nxp.com>
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Add the basic support for opteed SPD on imx8mq & imx8mm.
Signed-off-by: Jacky Bai <ping.bai@nxp.com>
Change-Id: I6c4855c89dea78d13d172c3d86cf047f829e51ce
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CAAM module must be initialized in secure world
before it can be used in non-secure world.
Change-Id: I042893667ddef99d8b6fc3902847d516d8591996
Signed-off-by: Jacky Bai <ping.bai@nxp.com>
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The i.MX8M Mini is new SOC of the i.MX8M family. it is
focused on delivering the latest and greatest video and
audio experience combining state-of-the-art media-specific
features with high-performance processing while optimized
for lowest power consumption. The i.MX 8M Mini Media Applications
Processor is 14nm FinFET product of the growing i.MX8M family
targeting the consumer & industrial market. It is built in 14LPP
to achieve both high performance and low power consumption
and relies on a powerful fully coherent core complex based on
a quad Cortex-A53 cluster with video and graphics accelerators
this patch add the basic support for i.MX8MM.
Signed-off-by: Jacky Bai <ping.bai@nxp.com>
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