| Age | Commit message (Collapse) | Author |
|---|
|
In some cases, the bl31 won't be reloaded when spl is not supported,
commit 17de039 adds the save/restore data section to fix boot issues
which is caused by the dirty data in data section of previous boot.
However, sometimes the backup data section in dram won't be erased
totally in board cold reboot, it will be restored and modify the
'correct' data section which will cause the board hang.
This commit uses a global flag 'data_section_restore_flag' which is
initialized as '0x1' and should be stored in data section to indicate
the save/restore behavior.
Test: cold/warm reboot on imx8qm/imx8qxp.
Signed-off-by: Ji Luo <ji.luo@nxp.com>
|
|
The SCFW supports OCRAM retention, so no need to set cpu entry for reboot
to let CPU run from SPL in OCRAM again when reboot, then SPL will reload
images after reboot.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Reviewed-by: Ye Li <ye.li@nxp.com>
|
|
Port and cleanup OP-TEE support.
Signed-off-by: Silvano di Ninno <silvano.dininno@nxp.com>
|
|
i.MX8 SoC with SCU inside support partition reboot, the partition reboot
will NOT reload the bl31.bin, so the data section could have some dirty
data of previous boot up, it will impact the reboot, so need to restore
the data section for partition reboot.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
|
|
i.MX8DXL ONLY supports up to 12*32 interrupt number, so the
first SPI interrupt offset should be from 0x2c.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
(cherry picked from commit cd0519bf70382292768adc1e9c0337808c55f148)
|
|
Add support for new SoC i.MX8DXL
Signed-off-by: Teo Hall <teo.hall@nxp.com>
(cherry picked from a7a008da03cd08cae3387c428ad8145fb1fae354)
|
