imx-atf.git - Reference implementation of ARM secure world software for i.MX

Age	Commit message (Collapse)	Author
2017-07-12	Enable CPU, FP, L2 retention counters to 64 cycles	Nitin Garg
	Signed-off-by: Nitin Garg <nitin.garg@nxp.com>
2017-07-12	Add support for A72 CPU0 as primary cpu	Anson Huang
	Need to add support for booting up A72 cluster only, so on need to check the cluster ID for primary CPU, that means if CPU ID is 0, then it can be as primary CPU. Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
2017-07-12	Fix A72 L2 DATA latency and support booting CA72 as primary	Nitin Garg
	Signed-off-by: Nitin Garg <nitin.garg@nxp.com>
2017-07-12	Add i.MX8 SoCs support	Anson Huang
	This patch adds i.MX8 SoCs ATFW support, including below basic features: * LPUART * SCFW RPC * SMP boot up Each SoC will have its own platform definition and driver to support. Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Bai Ping <ping.bai@nxp.com>