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2018-03-03Merge pull request #1292 from danh-arm/dh/spurious-dep-warndavidcunado-arm
Suppress spurious deprecated declaration warnings
2018-03-02Remove sp_min functions from plat_common.cSoby Mathew
This patch removes default platform implementations of sp_min platform APIs from plat/common/aarch32/plat_common.c. The APIs are now implemented in `plat_sp_min_common.c` file within the same folder. The ARM platform layer had a weak definition of sp_min_platform_setup2() which conflicted with the weak definition in the common file. Hence this patch fixes that by introducing a `plat_arm_` version of the API thus allowing individual boards within ARM platforms to override it if they wish to. Fixes ARM-software/tf-issues#559 Change-Id: I11a74ecae8191878ccc7ea03f12bdd5ae88faba5 Signed-off-by: Soby Mathew <soby.mathew@arm.com>
2018-03-01Suppress spurious deprecated declaration warningsDan Handley
Some generic compatibility functions emit deprecated declaration warnings even when platforms do not use the deprecated functions directly. This can be confusing. Suppress these warnings by using: `#pragma GCC diagnostic ignored "-Wdeprecated-declarations"` Also emit a runtime warning if the weak plat/common implemntation of plat_get_syscnt_freq2() is used, as this implies the platform has not migrated from plat_get_syscnt_freq(). The deprecated declaration warnings only help detect when platforms are calling deprecated functions, not when they are defining deprecated functions. Fixes ARM-software/tf-issues#550 Change-Id: Id14a92279c2634c1e76db8ef210da8affdbb2a5d Signed-off-by: Dan Handley <dan.handley@arm.com>
2018-02-28Fix MISRA rule 8.4 in common codeRoberto Vargas
Rule 8.4: A compatible declaration shall be visible when an object or function with external linkage is defined. Change-Id: I26e042cb251a6f9590afa1340fdac73e42f23979 Signed-off-by: Roberto Vargas <roberto.vargas@arm.com>
2018-02-26Dynamic cfg: MISRA fixesSoby Mathew
Change-Id: I1d85b76af002b8b672fcaeca94939b7420bc8243 Signed-off-by: Soby Mathew <soby.mathew@arm.com>
2018-02-26BL1: Deprecate the `bl1_init_bl2_mem_layout()` APISoby Mathew
The `bl1_init_bl2_mem_layout()` API is now deprecated. The default weak implementation of `bl1_plat_handle_post_image_load()` calculates the BL2 memory layout and populates the same in x1(r1). This ensures compatibility for the deprecated API. Change-Id: Id44bdc1f572dc42ee6ceef4036b3a46803689315 Signed-off-by: Soby Mathew <soby.mathew@arm.com>
2018-02-26Introduce the new BL handover interfaceSoby Mathew
This patch introduces a new BL handover interface. It essentially allows passing 4 arguments between the different BL stages. Effort has been made so as to be compatible with the previous handover interface. The previous blx_early_platform_setup() platform API is now deprecated and the new blx_early_platform_setup2() variant is introduced. The weak compatiblity implementation for the new API is done in the `plat_bl_common.c` file. Some of the new arguments in the new API will be reserved for generic code use when dynamic configuration support is implemented. Otherwise the other registers are available for platform use. Change-Id: Ifddfe2ea8e32497fe1beb565cac155ad9d50d404 Signed-off-by: Soby Mathew <soby.mathew@arm.com>
2018-02-26Add image_id to bl1_plat_handle_post/pre_image_load()Soby Mathew
This patch adds an argument to bl1_plat_post/pre_image_load() APIs to make it more future proof. The default implementation of these are moved to `plat_bl1_common.c` file. These APIs are now invoked appropriately in the FWU code path prior to or post image loading by BL1 and are not restricted to LOAD_IMAGE_V2. The patch also reorganizes some common platform files. The previous `plat_bl2_el3_common.c` and `platform_helpers_default.c` files are merged into a new `plat_bl_common.c` file. NOTE: The addition of an argument to the above mentioned platform APIs is not expected to have a great impact because these APIs were only recently added and are unlikely to be used. Change-Id: I0519caaee0f774dd33638ff63a2e597ea178c453 Signed-off-by: Soby Mathew <soby.mathew@arm.com>
2018-02-09qemu: Fix interrupt type checkSanteri Salko
Function plat_ic_get_pending_interrupt_type() should return interrupt type, not id. The function is used in aarch64 exception handling and currently the irq/fiq forwarding fails if a secure interrupt happens while running normal world. The qemu-specific gic file does not contain any extra functionality so it can be removed and common file can be used instead. fixes arm-software/tf-issues#546 Signed-off-by: Santeri Salko <santeri.salko@gmail.com>
2018-02-02bl1: add bl1_plat_handle_{pre,post}_image_load()Masahiro Yamada
Just like bl2_, add pre/post image load handlers for BL1. No argument is needed since BL2 is the only image loaded by BL1. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-02-02bl2: add bl2_plat_handle_pre_image_load()Masahiro Yamada
There are cases where we need to manipulate image information before the load. For example, for decompressing data, we cannot load the compressed images to their final destination. Instead, we need to load them to the temporary buffer for the decompressor. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-02-02plat/common: move arch-agnostic fallback functions to C fileMasahiro Yamada
When we add a new callback, we need to duplicate fallbacks among plat/common/{aarch32,aarch64}/platform_helpers.S This is tedious. I created a new C file, then moved 3 functions: plat_error_handler bl2_plat_preload_setup plat_try_next_boot_source They are called from C, so I do not see a good reason to implement them in assembly. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-01-24Merge pull request #1193 from jwerner-chromium/JW_corebootdavidcunado-arm
New console API and coreboot support [v4]
2018-01-19Add default crash console code to hook up to new console APIJulius Werner
This patch expands the weak stubs for the plat_crash_console_xxx functions in common platform code to use the new console API for crash output. This should make crash console output "just work" for most cases without the need for the platform to explicitly set up a crash console. For cases where the normal console framework doesn't work (e.g. very early crashes, before the platform can register any consoles), platforms are still able to override the functions just like before. This feature requires the MULTI_CONSOLE_API compile-time flag to work. For builds which don't have it set, this patch has no practical effect. Change-Id: I80dd161cb43f9db59a0bad2dae33c6560cfac584 Signed-off-by: Julius Werner <jwerner@chromium.org>
2018-01-18bl2-el3: Add BL2_EL3 imageRoberto Vargas
This patch enables BL2 to execute at the highest exception level without any dependancy on TF BL1. This enables platforms which already have a non-TF Boot ROM to directly load and execute BL2 and subsequent BL stages without need for BL1. This is not currently possible because BL2 executes at S-EL1 and cannot jump straight to EL3. Change-Id: Ief1efca4598560b1b8c8e61fbe26d1f44e929d69 Signed-off-by: Roberto Vargas <roberto.vargas@arm.com>
2017-12-12Add new function-pointer-based console APIJulius Werner
This patch overhauls the console API to allow for multiple console instances of different drivers that are active at the same time. Instead of binding to well-known function names (like console_core_init), consoles now provide a register function (e.g. console_16550_register()) that will hook them into the list of active consoles. All console operations will be dispatched to all consoles currently in the list. The new API will be selected by the build-time option MULTI_CONSOLE_API, which defaults to ${ERROR_DEPRECATED} for now. The old console API code will be retained to stay backwards-compatible to older platforms, but should no longer be used for any newly added platforms and can hopefully be removed at some point in the future. The new console API is intended to be used for both normal (bootup) and crash use cases, freeing platforms of the need to set up the crash console separately. Consoles can be individually configured to be active active at boot (until first handoff to EL2), at runtime (after first handoff to EL2), and/or after a crash. Console drivers should set a sane default upon registration that can be overridden with the console_set_scope() call. Code to hook up the crash reporting mechanism to this framework will be added with a later patch. This patch only affects AArch64, but the new API could easily be ported to AArch32 as well if desired. Change-Id: I35c5aa2cb3f719cfddd15565eb13c7cde4162549 Signed-off-by: Julius Werner <jwerner@chromium.org>
2017-11-23Merge pull request #1145 from etienne-lms/rfc-armv7-2davidcunado-arm
Support ARMv7 architectures
2017-11-13BL31: Add SDEI dispatcherJeenu Viswambharan
The implementation currently supports only interrupt-based SDEI events, and supports all interfaces as defined by SDEI specification version 1.0 [1]. Introduce the build option SDEI_SUPPORT to include SDEI dispatcher in BL31. Update user guide and porting guide. SDEI documentation to follow. [1] http://infocenter.arm.com/help/topic/com.arm.doc.den0054a/ARM_DEN0054A_Software_Delegated_Exception_Interface.pdf Change-Id: I758b733084e4ea3b27ac77d0259705565842241a Co-authored-by: Yousuf A <yousuf.sait@arm.com> Signed-off-by: Jeenu Viswambharan <jeenu.viswambharan@arm.com>
2017-11-13GIC: Introduce API to get interrupt IDJeenu Viswambharan
Acknowledging interrupt shall return a raw value from the interrupt controller in which the actual interrupt ID may be encoded. Add a platform API to extract the actual interrupt ID from the raw value obtained from interrupt controller. Document the new function. Also clarify the semantics of interrupt acknowledge. Change-Id: I818dad7be47661658b16f9807877d259eb127405 Signed-off-by: Jeenu Viswambharan <jeenu.viswambharan@arm.com>
2017-11-08aarch32: add few missing weak platform specific functionEtienne Carriere
Adds weak functions for plat_report_exception, bl1_plat_prepare_exit and plat_error_handler in AArch32 mode. Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
2017-11-03Fix PSCI STAT time stamp collectionSoby Mathew
This patch includes various fixes for PSCI STAT functionality relating to timestamp collection: 1. The PSCI stat accounting for retention states for higher level power domains were done outside the locks which could lead to spurious values in some race conditions. This is moved inside the locks. Also, the call to start the stat accounting was redundant which is now removed. 2. The timestamp wrap-around case when calculating residency did not cater for AArch32. This is now fixed. 3. In the warm boot path, `plat_psci_stat_accounting_stop()` was getting invoked prior to population of target power states. This is now corrected. Change-Id: I851526455304fb74ff0a724f4d5318cd89e19589 Signed-off-by: Soby Mathew <soby.mathew@arm.com>
2017-10-24Add platform hooks for boot redundancy supportRoberto Vargas
These hooks are intended to allow one platform to try load images from alternative places. There is a hook to initialize the sequence of boot locations and a hook to pass to the next sequence. Change-Id: Ia0f84c415208dc4fa4f9d060d58476db23efa5b2 Signed-off-by: Roberto Vargas <roberto.vargas@arm.com>
2017-10-16GIC: Add API to set priority maskJeenu Viswambharan
API documentation updated. Change-Id: I40feec1fe67a960d035061b54dd55610bc34ce1d Signed-off-by: Jeenu Viswambharan <jeenu.viswambharan@arm.com>
2017-10-16GIC: Add API to set/clear interrupt pendingJeenu Viswambharan
API documentation updated. Change-Id: I14e33cfc7dfa93257c82d76fae186b17a1b6d266 Co-authored-by: Yousuf A <yousuf.sait@arm.com> Signed-off-by: Jeenu Viswambharan <jeenu.viswambharan@arm.com>
2017-10-16GIC: Add API to set interrupt routingJeenu Viswambharan
SPIs can be routed to either a specific PE, or to any one of all available PEs. API documentation updated. Change-Id: I28675f634568aaf4ea1aa8aa7ebf25b419a963ed Co-authored-by: Yousuf A <yousuf.sait@arm.com> Signed-off-by: Jeenu Viswambharan <jeenu.viswambharan@arm.com>
2017-10-16GIC: Add API to raise secure SGIJeenu Viswambharan
API documentation updated. Change-Id: I129725059299af6cc612bafa8d74817f779d7c4f Signed-off-by: Jeenu Viswambharan <jeenu.viswambharan@arm.com>
2017-10-16GIC: Add APIs to set interrupt type and query supportJeenu Viswambharan
The back end GIC driver converts and assigns the interrupt type to suitable group. For GICv2, a build option GICV2_G0_FOR_EL3 is introduced, which determines to which type Group 0 interrupts maps to. - When the build option is set 0 (the default), Group 0 interrupts are meant for Secure EL1. This is presently the case. - Otherwise, Group 0 interrupts are meant for EL3. This means the SPD will have to synchronously hand over the interrupt to Secure EL1. The query API allows the platform to query whether the platform supports interrupts of a given type. API documentation updated. Change-Id: I60fdb4053ffe0bd006b3b20914914ebd311fc858 Co-authored-by: Yousuf A <yousuf.sait@arm.com> Signed-off-by: Jeenu Viswambharan <jeenu.viswambharan@arm.com>
2017-10-16GIC: Add API to set interrupt priorityJeenu Viswambharan
API documentation updated. Change-Id: Ib700eb1b8ca65503aeed0ac4ce0e7b934df67ff9 Co-authored-by: Yousuf A <yousuf.sait@arm.com> Signed-off-by: Jeenu Viswambharan <jeenu.viswambharan@arm.com>
2017-10-16GIC: Add APIs to enable and disable interruptJeenu Viswambharan
API documentation updated. Change-Id: Ice7511f8df5356851001d2f7dc2a46cfe318f9ba Co-authored-by: Yousuf A <yousuf.sait@arm.com> Signed-off-by: Jeenu Viswambharan <jeenu.viswambharan@arm.com>
2017-10-16GIC: Add API to get interrupt active statusJeenu Viswambharan
API documentation updated. Change-Id: I6d61785af0d5330930c709de971a904dc7c3516c Co-authored-by: Yousuf A <yousuf.sait@arm.com> Signed-off-by: Jeenu Viswambharan <jeenu.viswambharan@arm.com>
2017-10-16GIC: Add APIs to query interrupt typesJeenu Viswambharan
These APIs allow the GIC implementation to categorize interrupt numbers into SPIs, PPIs, and SGIs. The default implementations for GICv2 and GICv3 follows interrupt numbering as specified by the ARM GIC architecture. API documentation updated. Change-Id: Ia6aa379dc955994333232e6138f259535d4fa087 Signed-off-by: Jeenu Viswambharan <jeenu.viswambharan@arm.com>
2017-10-16GIC: Add API to get running priorityJeenu Viswambharan
Document the API in separate platform interrupt controller API document. Change-Id: If18f208e10a8a243f5c59d226fcf48e985941949 Co-authored-by: Yousuf A <yousuf.sait@arm.com> Signed-off-by: Jeenu Viswambharan <jeenu.viswambharan@arm.com>
2017-09-11Implement log frameworkSoby Mathew
This patch gives users control over logging messages printed from the C code using the LOG macros defined in debug.h Users now have the ability to reduce the log_level at run time using the tf_log_set_max_level() function. The default prefix string can be defined by platform by overriding the `plat_log_get_prefix()` platform API which is also introduced in this patch. The new log framework results in saving of some RO data. For example, when BL1 is built for FVP with LOG_LEVEL=LOG_LEVEL_VERBOSE, resulted in saving 384 bytes of RO data and increase of 8 bytes of RW data. The framework also adds about 108 bytes of code to the release build of FVP. Fixes ARM-software/tf-issues#462 Change-Id: I476013d9c3deedfdd4c8b0b0f125665ba6250554 Co-authored-by: Eleanor Bonnici <Eleanor.bonnici@arm.com> Signed-off-by: Soby Mathew <soby.mathew@arm.com>
2017-08-01FVP: Fix AArch32 stack functions to be ABI-compliantJeenu Viswambharan
plat_get_my_stack is called from C, so it can't expect argument registers to be preserved. Stash registers temporarily onto the stack instead. plat_set_my_stack is called during early init, when there exists no stack. Use any register other than argument registers to stash temporary values. Change-Id: I98052e20671d0933201d45ec7a5affccd71ce08c Signed-off-by: Jeenu Viswambharan <jeenu.viswambharan@arm.com>
2017-06-20sp_min: Implement `sp_min_plat_runtime_setup()`Dimitris Papastamos
On ARM platforms before exiting from SP_MIN ensure that the default console is switched to the runtime serial port. Change-Id: I0ca0d42cc47e345d56179eac16aa3d6712767c9b Signed-off-by: Dimitris Papastamos <dimitris.papastamos@arm.com>
2017-05-24cert: move platform_oid.h to include/tools_share for all platformsMasahiro Yamada
Platforms aligned with TBBR are supposed to use their own OIDs, but defining the same macros with different OIDs does not provide any value (at least technically). For easier use of TBBR, this commit allows platforms to reuse the OIDs obtained by ARM Ltd. This will be useful for non-ARM vendors that do not need their own extension fields in their certificate files. The OIDs of ARM Ltd. have been moved to include/tools_share/tbbr_oid.h Platforms can include <tbbr_oid.h> instead of <platform_oid.h> by defining USE_TBBR_DEFS as 1. USE_TBBR_DEFS is 0 by default to keep the backward compatibility. For clarification, I inserted a blank line between headers from the include/ directory (#include <...>) and ones from a local directory (#include "..." ). Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2017-05-03Use SPDX license identifiersdp-arm
To make software license auditing simpler, use SPDX[0] license identifiers instead of duplicating the license text in every file. NOTE: Files that have been imported by FreeBSD have not been modified. [0]: https://spdx.org/ Change-Id: I80a00e1f641b8cc075ca5a95b10607ed9ed8761a Signed-off-by: dp-arm <dimitris.papastamos@arm.com>
2017-04-20Remove build option `ASM_ASSERTION`Antonio Nino Diaz
The build option `ENABLE_ASSERTIONS` should be used instead. That way both C and ASM assertions can be enabled or disabled together. All occurrences of `ASM_ASSERTION` in common code and ARM platforms have been replaced by `ENABLE_ASSERTIONS`. ASM_ASSERTION has been removed from the user guide. Change-Id: I51f1991f11b9b7ff83e787c9a3270c274748ec6f Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
2017-03-31Add and use plat_crash_console_flush() APIAntonio Nino Diaz
This API makes sure that all the characters sent to the crash console are output before returning from it. Porting guide updated. Change-Id: I1785f970a40f6aacfbe592b6a911b1f249bb2735 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
2017-03-20Move plat/common source file definitions to generic Makefilesdp-arm
These source file definitions should be defined in generic Makefiles so that all platforms can benefit. Ensure that the symbols are properly marked as weak so they can be overridden by platforms. NOTE: This change is a potential compatibility break for non-upstream platforms. Change-Id: I7b892efa9f2d6d216931360dc6c436e1d10cffed Signed-off-by: dp-arm <dimitris.papastamos@arm.com>
2017-03-18Merge pull request #861 from soby-mathew/sm/aarch32_fixesdavidcunado-arm
Misc AArch32 fixes
2017-03-08Simplify translation tables headers dependenciesAntonio Nino Diaz
The files affected by this patch don't really depend on `xlat_tables.h`. By changing the included file it becomes easier to switch between the two versions of the translation tables library. Change-Id: Idae9171c490e0865cb55883b19eaf942457c4ccc Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
2017-03-02AArch32: Enable override of plat_set_my_stack/plat_get_my_stackSoby Mathew
This patch makes the default MP definitions of plat_get_my_stack() and plat_set_my_stack() as weak so that they can be overridden by the AArch32 Secure Payload if it requires. Change-Id: I3b6ddff5750443a776505e3023ff2934227592b6 Signed-off-by: Soby Mathew <soby.mathew@arm.com>
2017-02-13PSCI: Decouple PSCI stat residency calculation from PMFdp-arm
This patch introduces the following three platform interfaces: * void plat_psci_stat_accounting_start(const psci_power_state_t *state_info) This is an optional hook that platforms can implement in order to perform accounting before entering a low power state. This typically involves capturing a timestamp. * void plat_psci_stat_accounting_stop(const psci_power_state_t *state_info) This is an optional hook that platforms can implement in order to perform accounting after exiting from a low power state. This typically involves capturing a timestamp. * u_register_t plat_psci_stat_get_residency(unsigned int lvl, const psci_power_state_t *state_info, unsigned int last_cpu_index) This is an optional hook that platforms can implement in order to calculate the PSCI stat residency. If any of these interfaces are overridden by the platform, it is recommended that all of them are. By default `ENABLE_PSCI_STAT` is disabled. If `ENABLE_PSCI_STAT` is set but `ENABLE_PMF` is not set then an alternative PSCI stat collection backend must be provided. If both are set, then default weak definitions of these functions are provided, using PMF to calculate the residency. NOTE: Previously, platforms did not have to explicitly set `ENABLE_PMF` since this was automatically done by the top-level Makefile. Change-Id: I17b47804dea68c77bc284df15ee1ccd66bc4b79b Signed-off-by: dp-arm <dimitris.papastamos@arm.com>
2017-01-31tbbr: Simplify conditionaldp-arm
These are equivalent so use the reduced form. Change-Id: I40ca097411b9abab69985b8e4dbccf7582eae49e Signed-off-by: dp-arm <dimitris.papastamos@arm.com>
2017-01-24Use #ifdef for IMAGE_BL* instead of #ifMasahiro Yamada
One nasty part of ATF is some of boolean macros are always defined as 1 or 0, and the rest of them are only defined under certain conditions. For the former group, "#if FOO" or "#if !FOO" must be used because "#ifdef FOO" is always true. (Options passed by $(call add_define,) are the cases.) For the latter, "#ifdef FOO" or "#ifndef FOO" should be used because checking the value of an undefined macro is strange. Here, IMAGE_BL* is handled by make_helpers/build_macro.mk like follows: $(eval IMAGE := IMAGE_BL$(call uppercase,$(3))) $(OBJ): $(2) @echo " CC $$<" $$(Q)$$(CC) $$(TF_CFLAGS) $$(CFLAGS) -D$(IMAGE) -c $$< -o $$@ This means, IMAGE_BL* is defined when building the corresponding image, but *undefined* for the other images. So, IMAGE_BL* belongs to the latter group where we should use #ifdef or #ifndef. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-12-15tbbr: Fix updating of Non-Trusted NV counterdp-arm
The previous code required that a certificate be signed with the ROT key before the platform's NV counter could be updated with the value in the certificate. This implies that the Non-Trusted NV counter was not being updated for Non-Trusted content certificates, as they cannot be signed with the ROT key in the TBBR CoT scheme. The code is reworked to only allow updating the platform's Trusted NV counter when a certificate protected by the Trusted NV counter is signed with the ROT key. Content certificates protected by the Non-Trusted NV counter are allowed to update the platform's Non-Trusted NV counter, assuming that the certificate value is higher than the platform's value. A new optional platform API has been introduced, named plat_set_nv_ctr2(). Platforms may choose to implement it and perform additional checks based on the authentication image descriptor before modifying the NV counters. A default weak implementation is available that just calls into plat_set_nv_ctr(). Fixes ARM-software/tf-issues#426 Change-Id: I4fc978fd28a3007bc0cef972ff1f69ad0413b79c Signed-off-by: dp-arm <dimitris.papastamos@arm.com>
2016-12-01AArch32: Miscellaneous fixes in the AArch32 codeYatharth Kochar
This patch makes following miscellaneous fixes: * pl011_console.S: Fixed the bit mask used to check if the transmit FIFO is full or empty. * smcc_macros.S: Added `_fsxc` suffix while updating the SPSR. By default the assembler assumes `_fc` suffix which does not update all the fields in SPSR. By adding `_fsxc` suffix all the fields gets updated. * platform_helpers.S: Removed the weak definition for `plat_my_core_pos()` as this is a mandatory function which needs to be defined by all platforms. Change-Id: I8302292533c943686fff8d7c749a07132c052a3b Signed-off-by: Yatharth Kochar <yatharth.kochar@arm.com>
2016-10-25Fix comment of plat_reset_handler stubMasahiro Yamada
As described in the Porting Guide, plat_reset_handler should preserve x19 to x29. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2016-09-21AArch32: Common changes needed for BL1/BL2Yatharth Kochar
This patch adds common changes to support AArch32 state in BL1 and BL2. Following are the changes: * Added functions for disabling MMU from Secure state. * Added AArch32 specific SMC function. * Added semihosting support. * Added reporting of unhandled exceptions. * Added uniprocessor stack support. * Added `el3_entrypoint_common` macro that can be shared by BL1 and BL32 (SP_MIN) BL stages. The `el3_entrypoint_common` is similar to the AArch64 counterpart with the main difference in the assembly instructions and the registers that are relevant to AArch32 execution state. * Enabled `LOAD_IMAGE_V2` flag in Makefile for `ARCH=aarch32` and added check to make sure that platform has not overridden to disable it. Change-Id: I33c6d8dfefb2e5d142fdfd06a0f4a7332962e1a3
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