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AgeCommit message (Expand)Author
2018-06-21Merge pull request #1397 from dp-arm/dp/cortex-a76Dimitris Papastamos
2018-06-21Merge pull request #1405 from dp-arm/dp/cve_2017_5715Dimitris Papastamos
2018-06-21Merge pull request #1392 from dp-arm/dp/cve_2018_3639Dimitris Papastamos
2018-03-14Fixup `SMCCC_ARCH_FEATURES` semanticsDimitris Papastamos
2018-03-14Use PFR0 to identify need for mitigation of CVE-2017-5715Dimitris Papastamos
2018-02-27MISRA fixes for Cortex A75 AMU implementationDimitris Papastamos
2018-02-27Refactor AMU support for Cortex A75Dimitris Papastamos
2018-02-27Factor out CPU AMU helpersDimitris Papastamos
2018-02-22Fixup AArch32 errata printing frameworkSoby Mathew
2018-02-02Merge pull request #1253 from dp-arm/dp/amu32davidcunado-arm
2018-01-31AMU: Implement context save/restore for aarch32Joel Hutton
2018-01-29Optimize SMCCC_ARCH_WORKAROUND_1 on Cortex A57/A72/A73 and A75Dimitris Papastamos
2018-01-29Optimize/cleanup BPIALL workaroundDimitris Papastamos
2018-01-25Merge pull request #1228 from dp-arm/dp/cve_2017_5715davidcunado-arm
2018-01-20Merge pull request #1229 from manojkumar-arm/manojkumar-arm/ca72-aarch32-rese...davidcunado-arm
2018-01-19Merge pull request #1200 from robertovargas-arm/bl2-el3davidcunado-arm
2018-01-19lib/cpus: fix branching in reset function for cortex-a72 AARCH32 modeManoj Kumar
2018-01-18Workaround for CVE-2017-5715 for Cortex A9, A15 and A17Dimitris Papastamos
2018-01-18Print erratum application report for CVE-2017-5715Dimitris Papastamos
2018-01-18Change the default errata format stringDimitris Papastamos
2018-01-18bl2-el3: Add BL2_EL3 imageRoberto Vargas
2018-01-12Merge pull request #1197 from dp-arm/dp/amudavidcunado-arm
2018-01-11Add hooks to save/restore AMU context for Cortex A75Dimitris Papastamos
2018-01-11Use PFR0 to identify need for mitigation of CVE-2017-5915Dimitris Papastamos
2018-01-11Workaround for CVE-2017-5715 on Cortex A73 and A75Dimitris Papastamos
2018-01-11Workaround for CVE-2017-5715 on Cortex A57 and A72Dimitris Papastamos
2017-12-04Merge pull request #1168 from matt2048/masterdavidcunado-arm
2017-11-29Implement support for the Activity Monitor Unit on Cortex A75Dimitris Papastamos
2017-11-23Replace macro ASM_ASSERTION with macro ENABLE_ASSERTIONSMatt Ma
2017-11-08ARMv7: introduce Cortex-A12Etienne Carriere
2017-11-08ARMv7: introduce Cortex-A17Etienne Carriere
2017-11-08ARMv7: introduce Cortex-A7Etienne Carriere
2017-11-08ARMv7: introduce Cortex-A5Etienne Carriere
2017-11-08ARMv7: introduce Cortex-A9Etienne Carriere
2017-11-08ARMv7: introduce Cortex-A15Etienne Carriere
2017-09-07Cortex-A72: Implement workaround for erratum 859971Eleanor Bonnici
2017-09-07Cortex-A57: Implement workaround for erratum 859972Eleanor Bonnici
2017-08-29CPU: Correct names of implementation-defined aux regsEleanor Bonnici
2017-07-12Fix order of #includesIsla Mitchell
2017-06-28Introduce TF_LDFLAGSDouglas Raillard
2017-06-28Merge pull request #1002 from douglas-raillard-arm/dr/fix_errata_a53danh-arm
2017-06-27Resolve signed-unsigned comparison issuesDavid Cunado
2017-06-22Apply workarounds for A53 Cat A Errata 835769 and 843419Douglas Raillard
2017-06-20aarch32: Implement errata workarounds for Cortex A57Dimitris Papastamos
2017-06-20aarch32: Implement errata workarounds for Cortex A53Dimitris Papastamos
2017-06-20aarch32: Implement cpu_rev_var_hs()Dimitris Papastamos
2017-06-14Unique names for defines in the CPU librariesVarun Wadekar
2017-06-14Tegra: enable 'signed-comparison' compilation warning/errorsVarun Wadekar
2017-06-01Add support for Cortex-A75 and Cortex-A55 CPUsDavid Wang
2017-05-24Use a callee-saved register to be AAPCS-compliantdp-arm
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