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2019-12-13gic: make sure ProcessorSleep bit clear successfullyAnson Huang
GICR_WAKER.ProcessorSleep can only be set to zero when: — GICR_WAKER.Sleep bit[0] == 0. — GICR_WAKER.Quiescent bit[31] == 0. On some platforms, when system reboot with GIC in sleep mode but with power ON, such as on NXP's i.MX8QM, Linux kernel enters suspend but could be requested to reboot, and GIC is in sleep mode and it is inside a power domain which is ON in this scenario, when CPU reset, the GIC driver trys to set CORE's redistributor interface to awake, with GICR_WAKER.Sleep bit[0] and GICR_WAKER.Quiescent bit[31] both set, the ProcessorSleep bit[1] will never be clear and cause system hang. This patch makes sure GICR_WAKER.Sleep bit[0] and GICR_WAKER.Quiescent bit[31] are both zeor before clearing ProcessorSleep bit[1]. Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
2019-12-13drivers: add tzc380 debug supportAnson Huang
Add tzc380 debug support. Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
2019-10-08Correct UART PL011 initialization calculationAvinash Mehta
Currently for Armv7 plaforms the quotient calculated in pl011 uart init code is moved to register r1. This patch moves the quotient to register r2 as done for other platforms in the udiv instruction. Value of register r2 is then used to calculate the values for IBRD and FBRD register Change-Id: Ie6622f9f0e6d634378b471df5d02823b492c8a24 Signed-off-by: Avinash Mehta <avinash.mehta@arm.com>
2019-10-03gpio: stm32_gpio: do not mix error code typesNicolas Le Bayon
Change-Id: I84f8a99be2dcdf7c51fbecdb324df8e2f32cc855 Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com> Signed-off-by: Yann Gautier <yann.gautier@st.com>
2019-10-03mmc: increase delay between ACMD41 retriesYann Gautier
In the SD Specification, Power Up Diagram of Card figure, the Timeout value for initialization process (ACMD41 command retries) is 1 second. Align to match MMC cards (in mmc_send_op_cond()) and Linux kernel code, and set the delay between ACMD41 command retries to 10ms. Change-Id: I2e07cb9944e7d7b72f2d4b13e0505e6751458091 Signed-off-by: Yann Gautier <yann.gautier@st.com>
2019-09-27Merge changes from topic "ld/stm32-authentication" into integrationSoby Mathew
* changes: stm32mp1: add authentication support for stm32image bsec: move bsec_mode_is_closed_device() service to platform crypto: stm32_hash: Add HASH driver
2019-09-27Merge changes from topic "amlogic-g12a" into integrationSoby Mathew
* changes: amlogic: g12a: Add support for the S905X2 (G12A) platform amlogic: makefile: Use PLAT variable when possible amlogic: sha_dma: Move register mappings to platform header
2019-09-27Merge "GICv3 driver: Fix support for full SPI range" into integrationSoby Mathew
2019-09-27Merge changes from topic "mp/giv3-discovery" into integrationSoby Mathew
* changes: Migrate ARM platforms to use the new GICv3 API Adding new optional PSCI hook pwr_domain_on_finish_late GICv3: Enable multi socket GIC redistributor frame discovery
2019-09-26Merge changes I0283fc2e,Ib476d024,Iada05f7c into integrationPaul Beesley
* changes: hikey: fix to load FIP by partition table. hikey960: fix to load FIP by partition table drivers: partition: support different block size
2019-09-25GICv3: Enable multi socket GIC redistributor frame discoveryMadhukar Pappireddy
This patch provides declaration and definition of new GICv3 driver API: gicv3_rdistif_probe().This function delegates the responsibility of discovering the corresponding Redistributor base frame to each CPU itself. It is a modified version of gicv3_rdistif_base_addrs_probe() and is executed by each CPU in the platform unlike the previous approach in which only the Primary CPU did the discovery of all the Redistributor frames for every CPU. The flush operations as part of gicv3_driver_init() function are made necessary even for platforms with WARMBOOT_ENABLE_DCACHE_EARLY because the GICv3 driver data structure contents are accessed by CPU with D-Cache turned off during power down operations. Change-Id: I1833e81d3974b32a3e4a3df4766a33d070982268 Signed-off-by: Madhukar Pappireddy <madhukar.pappireddy@arm.com>
2019-09-23stm32mp1: add authentication support for stm32imageLionel Debieve
This commit adds authentication binary support for STM32MP1. It prints the bootrom authentication result if signed image is used and authenticates the next loaded STM32 images. It also enables the dynamic translation table support (PLAT_XLAT_TABLES_DYNAMIC) to use bootrom services. Signed-off-by: Lionel Debieve <lionel.debieve@st.com> Change-Id: Iba706519e0dc6b6fae1f3dd498383351f0f75f51
2019-09-20bsec: move bsec_mode_is_closed_device() service to platformLionel Debieve
This BSEC service is a platform specific service. Implementation moved to the platform part. Signed-off-by: Lionel Debieve <lionel.debieve@st.com> Change-Id: I1f70ed48a446860498ed111acce01187568538c9
2019-09-20crypto: stm32_hash: Add HASH driverLionel Debieve
The driver manages the HASH processor IP on STM32MP1 Signed-off-by: Lionel Debieve <lionel.debieve@st.com> Change-Id: I3b67c80c16d819f86b951dae29a6c465e51ad585
2019-09-18drivers: partition: support different block sizeHaojian Zhuang
The block size of some storage device is 4096-byte long, such as UFS. But PARTITION_BLOCK_SIZE is defined as 512-byte long. So replace it by PLAT_PARTITION_BLOCK_SIZE. Make it configurable in platform. Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org> Change-Id: Iada05f7c646d0a0f2c0d3b8545540b3cb7153de3
2019-09-18amlogic: sha_dma: Move register mappings to platform headerCarlo Caione
The registers location for the SHA DMA driver is not unique for the different platforms. Move the mapping out of the driver and into the platform-specific header. Signed-off-by: Carlo Caione <ccaione@baylibre.com> Change-Id: Ice64637844a3cb384b01e466cb8c1cea5f764129
2019-09-13rpi3: Move rng driver to driversAndre Przywara
To allow sharing the driver between the RPi3 and RPi4, move the random number generator driver into the generic driver directory. Change-Id: Iae94d7cb22c6bce3af9bff709d76d4caf87b14d1 Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2019-09-13rpi3: Move VC mailbox driver into generic drivers directoryAndre Przywara
To allow sharing the driver between the RPi3 and RPi4, move the mailbox driver into the generic driver directory. Change-Id: I463e49acf82b02bf004f3d56482b7791f3020bc0 Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2019-09-13GICv3 driver: Fix support for full SPI rangeAlexei Fedorov
This patch fixes GICv3 driver bug which causes assertion when full range of SPI INTIDs 32-1019 is supported in GICv3 implementation. Change-Id: Ib6da4b6eea868cff271cb32c7c7570bf5547ab47 Signed-off-by: Alexei Fedorov <Alexei.Fedorov@arm.com>
2019-09-13Merge "stm32mp1: manage CONSOLE_FLAG_TRANSLATE_CRLF and cleanup driver" into ↵Soby Mathew
integration
2019-09-12Remove RSA PKCS#1 v1.5 support from cert_toolJustin Chadwell
Support for PKCS#1 v1.5 was deprecated in SHA 1001202 and fully removed in SHA fe199e3, however, cert_tool is still able to generate certificates in that form. This patch fully removes the ability for cert_tool to generate these certificates. Additionally, this patch also fixes a bug where the issuing certificate was a RSA and the issued certificate was EcDSA. In this case, the issued certificate would be signed using PKCS#1 v1.5 instead of RSAPSS per PKCS#1 v2.1, preventing TF-A from verifying the image signatures. Now that PKCS#1 v1.5 support is removed, all certificates that are signed with RSA now use the more modern padding scheme. Change-Id: Id87d7d915be594a1876a73080528d968e65c4e9a Signed-off-by: Justin Chadwell <justin.chadwell@arm.com>
2019-09-12Support larger RSA key sizes when using MBEDTLSJustin Chadwell
Previously, TF-A could not support large RSA key sizes as the configuration options passed to MBEDTLS prevented storing and performing calculations with the larger, higher-precision numbers required. With these changes to the arguments passed to MBEDTLS, TF-A now supports using 3072 (3K) and 4096 (4K) keys in certificates. Change-Id: Ib73a6773145d2faa25c28d04f9a42e86f2fd555f Signed-off-by: Justin Chadwell <justin.chadwell@arm.com>
2019-09-12Merge changes I072c0f61,I798401f4,I9648ef55,I7225d9fa,Ife682288, ... into ↵Soby Mathew
integration * changes: rcar_gen3: drivers: ddr_b: Update DDR setting for H3, M3, M3N rcar_gen3: drivers: qos: update QoS setting rcar_gen3: drivers: ddr_b: Fix checkpatch errors in headers rcar_gen3: drivers: ddr_b: Fix line-over-80s rcar_gen3: drivers: ddr_b: Further checkpatch cleanups rcar_gen3: drivers: ddr_b: Clean up camel case rcar_get3: drivers: ddr_b: Basic checkpatch fixes rcar_get3: drivers: ddr: Partly unify register macros between DDR A and B rcar_get3: drivers: ddr: Clean up common code
2019-09-12Merge changes from topic "amlogic-refactoring" into integrationSoby Mathew
* changes: amlogic: Fix includes order amlogic: Fix header guards amlogic: Fix prefixes in the SoC specific files amlogic: Fix prefixes in the PM code amlogic: Fix prefixes in the SCPI related code amlogic: Fix prefixes in the MHU code amlogic: Fix prefixes in the SIP/SVC code amlogic: Fix prefixes in the thermal driver amlogic: Fix prefixes in the private header file amlogic: Fix prefixes in the efuse driver amlogic: Fix prefixes in the platform macros file amlogic: Fix prefixes in the helpers file amlogic: Rework Makefiles amlogic: Move the SIP SVC code to common directory amlogic: Move topology file to common directory amlogic: Move thermal code to common directory amlogic: Move MHU code to common directory amlogic: Move efuse code to common directory amlogic: Move platform macros assembly file to common directory amlogic: Introduce unified private header file amlogic: Move SCPI code to common directory amlogic: Move the SHA256 DMA driver to common directory amlogic: Move assembly helpers to common directory amlogic: Introduce directory parameters in the makefiles meson: Rename platform directory to amlogic
2019-09-10stm32mp1: manage CONSOLE_FLAG_TRANSLATE_CRLF and cleanup driverYann Gautier
The STM32 console driver was pre-pending '\r' before '\n'. It is now managed by the framework with the flag: CONSOLE_FLAG_TRANSLATE_CRLF. Remove the code in driver, and add the flag for STM32MP1. Change-Id: I5d0d5d5c4abee0b7dc11c2f8707b1b5cf10149ab Signed-off-by: Yann Gautier <yann.gautier@st.com>
2019-09-05amlogic: Move the SHA256 DMA driver to common directoryCarlo Caione
The SHA256 DMA driver can be used by multiple SoCs. Move it to the common directory. Signed-off-by: Carlo Caione <ccaione@baylibre.com> Change-Id: I96319eeeeeebd503ef0dcb07c0e4ff6a67afeaa5
2019-09-05meson: Rename platform directory to amlogicCarlo Caione
Meson is the internal code name for the SoC family. The correct name for the platform should be Amlogic. Change the name of the platform directory. Signed-off-by: Carlo Caione <ccaione@baylibre.com> Change-Id: Icc140e1ea137f12117acbf64c7dcb1a8b66b345d
2019-09-02mmc: stm32_sdmmc2: correctly manage block sizeYann Gautier
DBLOCKSIZE should be filled such as the data size is 2^DBLOCKSIZE. Hence it is calculated with __builtin_ctz. Change-Id: Id6b5ff9b594afc4fc523a388011beed307e6abd1 Signed-off-by: Yann Gautier <yann.gautier@st.com>
2019-09-02mmc: stm32_sdmmc2: manage max-frequency property from DTYann Gautier
If the max-frequency property is provided in the device tree mmc node, it should be managed. The max allowed frequency will be the min between this property value and what the card can support. Change-Id: I885b676c3300d2670a0fe4c6ecab87758b5893ad Signed-off-by: Yann Gautier <yann.gautier@st.com>
2019-09-02stm32mp1: move check_header() to common codeYann Gautier
This function can be used on several stm32mp devices, it is then moved in plat/st/common/stm32mp_common.c. Change-Id: I862debe39604410f71a9ddc28713026362e9ecda Signed-off-by: Yann Gautier <yann.gautier@st.com>
2019-09-02stm32mp1: add support for LpDDR3Yann Gautier
This change enables LpDDR3 initialization with PMIC. Change-Id: I2409a808335dfacd69a8517cb8510cee98bb8161 Signed-off-by: Yann Gautier <yann.gautier@st.com>
2019-09-02stm32mp1: use a common function to check spinlock is availableYann Gautier
To use spinlocks, MMU should be enabled, as well as data cache. A common function is created (moved from clock file). It is then used whenever a spinlock has to be taken, in BSEC and clock drivers. Change-Id: I94baed0114a2061ad71bd5287a91bf7f1c6821f6 Signed-off-by: Yann Gautier <yann.gautier@st.com>
2019-09-02clk: stm32mp: enable RTCAPB clock for dual-core chipsYann Gautier
In order to correctly manage the bring-up of non boot CPUs, the RTCAPB clock needs to be enabled. It controls the access to backup registers, where the CPU entrypoint will be stored. Change-Id: Ifeeceb4faf64bc9e0778030444f437cc0bb27272 Signed-off-by: Yann Gautier <yann.gautier@st.com> Signed-off-by: Etienne Carriere <etienne.carriere@st.com> Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com>
2019-09-02stm32mp1: add watchdog supportYann Gautier
Introduce driver for STM32 IWDG peripheral (Independent Watchdog). It is configured according to device tree content and should be enabled from there. The watchdog is not started by default. It can be started after an HW reset if the dedicated OTP is fused. The watchdog also needs to be frozen if a debugger is attached. This is done by configuring the correct bits in DBGMCU. This configuration is allowed by checking BSEC properties. An increase of BL2 size is also required when adding this new code. Change-Id: Ide7535d717885ce2f9c387cf17afd8b5607f3e7f Signed-off-by: Yann Gautier <yann.gautier@st.com> Signed-off-by: Lionel Debieve <lionel.debieve@st.com> Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com>
2019-08-29rcar_gen3: drivers: ddr_b: Update DDR setting for H3, M3, M3NChiaki Fujii
[IPL/DDR] - Update H3, M3, M3N DDR setting rev.0.37. Signed-off-by: Chiaki Fujii <chiaki.fujii.wj@renesas.com> Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Change-Id: I072c0f61cd896e74e4e1eee39d313f82cf2f7295
2019-08-29rcar_gen3: drivers: qos: update QoS settingYoshifumi Hosoya
[IPL/QoS] - Update M3 Ver.3.0 QoS setting rev.0.04. Signed-off-by: Yoshifumi Hosoya <yoshifumi.hosoya.wj@renesas.com> Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Change-Id: I798401f417df6a352d94311ea07a1e96ba562f6a
2019-08-29rcar_gen3: drivers: ddr_b: Fix checkpatch errors in headersMarek Vasut
Clean up the DDR B header files and remove checkpatch errors. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Change-Id: I9648ef5511df299688fd5284513812d32a1f8064
2019-08-29rcar_gen3: drivers: ddr_b: Fix line-over-80sMarek Vasut
Fix as many line-over-80s as possible. There are still a few remaining, which would need further refactoring. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Change-Id: I7225d9fab658d05e3315d8c3fa3c9f3bbb1ab40d
2019-08-29rcar_gen3: drivers: ddr_b: Further checkpatch cleanupsMarek Vasut
Address more checkpatch CHECKs and ERRORs, no functional change. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Change-Id: Ife682288cef3afa860571b2aca647c9ffe936125
2019-08-29rcar_gen3: drivers: ddr_b: Clean up camel caseMarek Vasut
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Change-Id: Ifda28578f326b1d4518560384d50ae98806db26e
2019-08-29rcar_get3: drivers: ddr_b: Basic checkpatch fixesMarek Vasut
Do basic automated checkpatch fixes on the ddr_b, no functional change. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Change-Id: Ie401ec049a05d2c4c8044749994391adea171679
2019-08-29rcar_get3: drivers: ddr: Partly unify register macros between DDR A and BMarek Vasut
The ddr_a and ddr_b register macros are the same for the most part, unify them into a single header. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Change-Id: I8f55d6d779837215339ac0010e8c8ab5f6748d75
2019-08-29rcar_get3: drivers: ddr: Clean up common codeMarek Vasut
Do minor coding style changes to the common DDR init code to make it checkpatch compliant and move macros out into rcar_def.h. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Change-Id: I67eadf8099e4ff8702105c9e07b13f308d9dbe3d
2019-08-20Merge "rcar_gen3: plat: Rename RCAR_PRODUCT_* to PRR_PRODUCT_*" into integrationPaul Beesley
2019-08-20Merge "rcar_gen3: plat: Factor out PRR_ macros into rcar_def.h" into integrationPaul Beesley
2019-08-19console: add a flag to prepend '\r' in the multi-console frameworkMasahiro Yamada
Currently, console drivers prepend '\r' to '\n' by themselves. This is common enough to be supported in the framework. Add a new flag, CONSOLE_FLAG_TRANSLATE_CRLF. A driver can set this flag to ask the framework to transform LF into CRLF instead of doing it by itself. Change-Id: I4f5c5887591bc0a8749a105abe62b6562eaf503b Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2019-08-16rcar_gen3: plat: Rename RCAR_PRODUCT_* to PRR_PRODUCT_*Marek Vasut
Rename RCAR_PRODUCT_* to PRR_PRODUCT_* and drop the duplicate RCAR_PRODUCT_* macro. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Change-Id: I6b2789790b85edb79c026f0860d70f323d113d96
2019-08-16rcar_gen3: plat: Factor out PRR_ macros into rcar_def.hMarek Vasut
Pull out the PRR_* macros into rcar_def.h and remove multiple copies of it. Now that there are still RCAR_* macros in rcar_def.h too and they have the exact same meaning as the PRR_* macros, but that's for another patch. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Change-Id: Icb7f61b971b1a23102bd1b9f58cda580660a55fc
2019-08-01Switch AARCH32/AARCH64 to __aarch64__Julius Werner
NOTE: AARCH32/AARCH64 macros are now deprecated in favor of __aarch64__. All common C compilers pre-define the same macros to signal which architecture the code is being compiled for: __arm__ for AArch32 (or earlier versions) and __aarch64__ for AArch64. There's no need for TF-A to define its own custom macros for this. In order to unify code with the export headers (which use __aarch64__ to avoid another dependency), let's deprecate the AARCH32 and AARCH64 macros and switch the code base over to the pre-defined standard macro. (Since it is somewhat unintuitive that __arm__ only means AArch32, let's standardize on only using __aarch64__.) Change-Id: Ic77de4b052297d77f38fc95f95f65a8ee70cf200 Signed-off-by: Julius Werner <jwerner@chromium.org>
2019-08-01Replace __ASSEMBLY__ with compiler-builtin __ASSEMBLER__Julius Werner
NOTE: __ASSEMBLY__ macro is now deprecated in favor of __ASSEMBLER__. All common C compilers predefine a macro called __ASSEMBLER__ when preprocessing a .S file. There is no reason for TF-A to define it's own __ASSEMBLY__ macro for this purpose instead. To unify code with the export headers (which use __ASSEMBLER__ to avoid one extra dependency), let's deprecate __ASSEMBLY__ and switch the code base over to the predefined standard. Change-Id: Id7d0ec8cf330195da80499c68562b65cb5ab7417 Signed-off-by: Julius Werner <jwerner@chromium.org>
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