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2019-10-22Merge "Update change log for v2.2 Release" into integrationPaul Beesley
2019-10-22Merge "Update release-information for v2.2 Release" into integrationPaul Beesley
2019-10-22doc: Final, pre-release fixes and updatesPaul Beesley
A small set of misc changes to ensure correctness before the v2.2 release tagging. Change-Id: I888840b9483ea1a1633d204fbbc0f9594072101e Signed-off-by: Paul Beesley <paul.beesley@arm.com>
2019-10-22Update release-information for v2.2 Releaselaurenw-arm
Removed deprecated interfaces that have been removed from the TF-A project, updated the deprecated list with new deprecations for v2.2 Release, added upcoming release information, remove mentions of PR from github. Signed-off-by: Lauren Wehrmeister <lauren.wehrmeister@arm.com> Signed-off-by: Paul Beesley <paul.beesley@arm.com> Change-Id: I2b59d351cde9860ad0dcb6520a8bd2827ad403cf
2019-10-22doc: Expand contact information in About sectionPaul Beesley
Giving a bit more background information about the issue tracker and mailing lists. Change-Id: I68921d54e3113d348f1e16c685f74d32df2ca19f Signed-off-by: Paul Beesley <paul.beesley@arm.com>
2019-10-21Update change log for v2.2 Releaselaurenw-arm
Signed-off-by: Lauren Wehrmeister <lauren.wehrmeister@arm.com> Change-Id: I53a7706016539e7de7fdbe87b786d99665bbe1d8
2019-10-21doc: Move platform list to the Platform Ports index pagePaul Beesley
The list of upstream platforms on the index page is growing quite long, especially with all the FVP variants being listed individually. This patch leverages the "Platform Ports" chapter in the docs table of contents to condense this information. Almost all platform ports now have documentation, so the table of contents serves as the list of upstream platforms by itself. For those upstream platforms that do not have corresponding documentation, the top-level "Platform Ports" page mentions them individually. It also mentions each Arm FVP, just as the index page did before. Note that there is an in-progress patch that creates new platform port documentation for the Arm Juno and Arm FVP platforms, so this list of "other platforms" will soon be reduced further as those platforms become part of the table of contents as well. Change-Id: I6b1eab8cba71a599d85a6e22553a34b07f213268 Signed-off-by: Paul Beesley <paul.beesley@arm.com>
2019-10-21doc: Move "About" content from index.rst to a new chapterPaul Beesley
The index.rst page is now the primary landing page for the TF-A documentation. It contains quite a lot of content these days, including: - The project purpose and general intro - A list of functionality - A list of planned functionality - A list of supported platforms - "Getting started" links to other documents - Contact information for raising issues This patch creates an "About" chapter in the table of contents and moves some content there. In order, the above listed content: - Stayed where it is. This is the right place for it. - Moved to About->Features - Moved to About->Features (in subsection) - Stayed where it is. Moved in a later patch. - Was expanded in-place - Moved to About->Contact Change-Id: I254bb87560fd09140b9e485cf15246892aa45943 Signed-off-by: Paul Beesley <paul.beesley@arm.com>
2019-10-18Merge "Fix documentation" into integrationPaul Beesley
2019-10-17doc: Remove version and release variables from conf.pyPaul Beesley
We would need to update this version for the release but, in fact, it is not required for our publishing workflow; the hosted version of the docs uses git commit/tag information in place of these variables anyway. Instead of updating the version, just remove these variables entirely. Change-Id: I424c4e45786e87604e91c7197b7983579afe4806 Signed-off-by: Paul Beesley <paul.beesley@arm.com>
2019-10-15Fix documentationArtsem Artsemenka
User guide: 1. Remove obsolete note saying only FVP is supported with AArch32 2. Switch compiler for Juno AArch32 to arm-eabi 3. Mention SOFTWARE folder in Juno Linaro release Index.rst: 1. Switch default FVP model to Version 11.6 Build 45 Signed-off-by: Artsem Artsemenka <artsem.artsemenka@arm.com> Change-Id: Ib47a2ea314e2b8394a20189bf91796de0e17de53
2019-10-15Merge "doc: Update Linaro release mentioned on index page" into integrationPaul Beesley
2019-10-15doc: Update Linaro release mentioned on index pagePaul Beesley
The version of the Linaro release that is used for testing was updated in 35010bb8 and the user guide was updated with the correct version, however the version is also mentioned on the index page and that was missed. Update the index page with the new version. We can come back and de-duplicate this content later, to ease future maintenance. Change-Id: I3fe83d7a1c59ab8d3ce2b18bcc23e16c93f7af97 Signed-off-by: Paul Beesley <paul.beesley@arm.com>
2019-10-11doc: Misc syntax and spelling fixesPaul Beesley
Tidying up a few Sphinx warnings that had built-up over time. None of these are critical but it cleans up the Sphinx output. At the same time, fixing some spelling errors that were detected. Change-Id: I38209e235481eed287f8008c6de9dedd6b12ab2e Signed-off-by: Paul Beesley <paul.beesley@arm.com>
2019-10-09doc: Add guide for building the docs locallyPaul Beesley
This new page contains instructions for doing a local build of the documentation, plus information on the environment setup that needs to be done beforehand. Change-Id: If563145ab40639cabbe25d0f62759981a33692c6 Signed-off-by: Paul Beesley <paul.beesley@arm.com>
2019-10-08doc: De-duplicate readme and license filesPaul Beesley
The readme.rst and license.rst files in the project root overlap with the index.rst and license.rst files in the docs/ folder. We need to use the latter when building the documentation, as Sphinx requires all included files to be under a common root. However, the files in the root are currently used by the cgit and Github viewers. Using symlinks in Git presents some difficulties so the best course of action is likely to leave these files but in stub form. The license.rst file in the root will simply tell the reader to refer to docs/license.rst. The readme.rst file will contain a small amount of content that is derived from the docs/index.rst file, so that the Github main page will have something valid to show, but it will also contain a link to the full documentation on ReadTheDocs. Change-Id: I6dc46f08777e8d7ecb32ca7afc07a28486c9f77a Signed-off-by: Paul Beesley <paul.beesley@arm.com>
2019-10-08doc: Convert internal links to RST formatPaul Beesley
Currently links between documents are using the format: <path/to/><filename>.rst This was required for services like GitHub because they render each document in isolation - linking to another document is like linking to any other file, just provide the full path. However, with the new approach, the .rst files are only the raw source for the documents. Once the documents have been rendered the output is now in another format (HTML in our case) and so, when linking to another document, the link must point to the rendered version and not the .rst file. The RST spec provides a few methods for linking between content. The parent of this patch enabled the automatic creation of anchors for document titles - we will use these anchors as the targets for our links. Additional anchors can be added by hand if needed, on section and sub-section titles, for example. An example of this new format, for a document with the title "Firmware Design" is :ref:`Firmware Design`. One big advantage of this is that anchors are not dependent on paths. We can then move documents around, even between directories, without breaking any links between documents. Links will need to be updated only if the title of a document changes. Change-Id: I9e2340a61dd424cbd8fd1ecc2dc166f460d81703 Signed-off-by: Paul Beesley <paul.beesley@arm.com>
2019-10-07doc: Add more missing platformsPaul Beesley
Add meson-g12a, qemu-sbsa and rpi4 to the documentation index so that they will have their docs rendered and integrated into the table of contents. Change-Id: Id972bf2fee67312dd7bff29f92bea67842e62431 Signed-off-by: Paul Beesley <paul.beesley@arm.com>
2019-10-07Merge "Neoverse N1 Errata Workaround 1542419" into integrationSoby Mathew
2019-10-07Merge "Fix the CAS spinlock implementation" into integrationSoby Mathew
2019-10-04Neoverse N1 Errata Workaround 1542419laurenw-arm
Coherent I-cache is causing a prefetch violation where when the core executes an instruction that has recently been modified, the core might fetch a stale instruction which violates the ordering of instruction fetches. The workaround includes an instruction sequence to implementation defined registers to trap all EL0 IC IVAU instructions to EL3 and a trap handler to execute a TLB inner-shareable invalidation to an arbitrary address followed by a DSB. Signed-off-by: Lauren Wehrmeister <lauren.wehrmeister@arm.com> Change-Id: Ic3b7cbb11cf2eaf9005523ef5578a372593ae4d6
2019-10-04Fix the CAS spinlock implementationSoby Mathew
Make the spinlock implementation use ARMv8.1-LSE CAS instruction based on a platform build option. The CAS-based implementation used to be unconditionally selected for all ARM8.1+ platforms. The previous CAS spinlock implementation had a bug wherein the spin_unlock() implementation had an `sev` after `stlr` which is not sufficient. A dsb is needed to ensure that the stlr completes prior to the sev. Having a dsb is heavyweight and a better solution would be to use load exclusive semantics to monitor the lock and wake up from wfe when a store happens to the lock. The patch implements the same. Change-Id: I5283ce4a889376e4cc01d1b9d09afa8229a2e522 Signed-off-by: Soby Mathew <soby.mathew@arm.com> Signed-off-by: Olivier Deprez <olivier.deprez@arm.com>
2019-10-03Merge changes from topic "qemu_sbsa" into integrationSoby Mathew
* changes: qemu/qemu_sbsa: Adding memory mapping for both FLASH0/FLASH1 qemu/qemu_sbsa: Adding Qemu SBSA platform
2019-10-02doc: Fix GCC version to 8.3-2019.03Louis Mayencourt
Change-Id: I3b866e927d93f4b690aa4891940fc8afabf4146e Signed-off-by: Louis Mayencourt <louis.mayencourt@arm.com>
2019-10-01Merge "doc: Migrate to Linaro release 19.06" into integrationSandrine Bailleux
2019-10-01qemu/qemu_sbsa: Adding Qemu SBSA platformRadoslaw Biernacki
This patch introduces Qemu SBSA platform. Both platform specific files where copied from qemu/qemu with changes for DRAM base above 32bit and removal of ARMv7 conditional defines/code. Documentation is aligned to rest of SBSA patches along the series and planed changes in edk2-platform repo. Fixes ARM-software/tf-issues#602 Signed-off-by: Radoslaw Biernacki <radoslaw.biernacki@linaro.org> Change-Id: I8ebc34eedb2268365e479ef05654b2df1b99128c
2019-09-30doc: Migrate to Linaro release 19.06zelalem-aweke
- Updated Linaro release version number to 19.06 - Updated links to Linaro instructions and releases - Removed the Linaro old releases link Signed-off-by: zelalem-aweke <zelalem.aweke@arm.com> Change-Id: Ib786728106961e89182b42183e7b889f6fc74190
2019-09-27Merge "doc: Fix platform port inclusion" into integrationSoby Mathew
2019-09-27Merge changes from topic "amlogic-g12a" into integrationSoby Mathew
* changes: amlogic: g12a: Add support for the S905X2 (G12A) platform amlogic: makefile: Use PLAT variable when possible amlogic: sha_dma: Move register mappings to platform header
2019-09-27Merge changes from topic "raspberry-pi-4-support" into integrationSoby Mathew
* changes: rpi4: Add initial documentation file rpi4: Add stdout-path to device tree rpi4: Add GIC maintenance interrupt to GIC DT node rpi4: Cleanup memory regions, move pens to first page rpi4: Reserve resident BL31 region from non-secure world rpi4: Amend DTB to advertise PSCI rpi4: Determine BL33 entry point at runtime rpi4: Accommodate "armstub8.bin" header at the beginning of BL31 image Add basic support for Raspberry Pi 4 rpi3: Allow runtime determination of UART base clock rate FDT helper functions: Respect architecture in PSCI function IDs FDT helper functions: Add function documentation
2019-09-27Merge changes from topic "mp/giv3-discovery" into integrationSoby Mathew
* changes: Migrate ARM platforms to use the new GICv3 API Adding new optional PSCI hook pwr_domain_on_finish_late GICv3: Enable multi socket GIC redistributor frame discovery
2019-09-26Merge changes I0283fc2e,Ib476d024,Iada05f7c into integrationPaul Beesley
* changes: hikey: fix to load FIP by partition table. hikey960: fix to load FIP by partition table drivers: partition: support different block size
2019-09-26amlogic: g12a: Add support for the S905X2 (G12A) platformCarlo Caione
Introduce the preliminary support for the Amlogic S905X2 (G12A) SoC. This port is a minimal implementation of BL31 capable of booting mainline U-Boot and Linux. Tested on a SEI510 board. Signed-off-by: Carlo Caione <ccaione@baylibre.com> Change-Id: Ife958f10e815a4530292c45446adb71239f3367f
2019-09-25Adding new optional PSCI hook pwr_domain_on_finish_lateMadhukar Pappireddy
This PSCI hook is similar to pwr_domain_on_finish but is guaranteed to be invoked with the respective core and cluster are participating in coherency. This will be necessary to safely invoke the new GICv3 API which modifies shared GIC data structures concurrently. Change-Id: I8e54f05c9d4ef5712184c9c18ba45ac97a29eb7a Signed-off-by: Madhukar Pappireddy <madhukar.pappireddy@arm.com>
2019-09-25doc: Fix platform port inclusionPaul Beesley
This patch: - Adds any leftover platform ports that were not having their documentation built (not in the index.rst table of contents) - Corrects a handful of RST formatting errors that cause poor rendering - Reorders the list of platforms so that they are displayed in alphabetical order Change-Id: If8c135a822d581c3c5c4fca2936d501ccfd2e94c Signed-off-by: Paul Beesley <paul.beesley@arm.com>
2019-09-25rpi4: Add initial documentation fileAndre Przywara
As the Raspberry Pi4 port is now in a usable state, add the build instructions together with some background information to the documentation directory. The port differs quite a bit from the Raspberry Pi 3, so we use a separate file for that. Change-Id: I7d9f5967fdf3ec3bfe97d78141f59cbcf03388d4 Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2019-09-20doc: Render Marvell platform documentsPaul Beesley
The documentation for Marvell platforms was not included in the rendered document output until now because, while it was mostly valid RST format, the files were saved with a .txt extension. This patch corrects some RST formatting errors, creates a document tree (index page) for the Marvell documents, and adds the Marvell subtree to the main index. Change-Id: Id7d4ac37eded636f8f62322a153e1e5f652ff51a Signed-off-by: Paul Beesley <paul.beesley@arm.com>
2019-09-18drivers: partition: support different block sizeHaojian Zhuang
The block size of some storage device is 4096-byte long, such as UFS. But PARTITION_BLOCK_SIZE is defined as 512-byte long. So replace it by PLAT_PARTITION_BLOCK_SIZE. Make it configurable in platform. Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org> Change-Id: Iada05f7c646d0a0f2c0d3b8545540b3cb7153de3
2019-09-13Merge "Refactor ARMv8.3 Pointer Authentication support code" into integrationSoby Mathew
2019-09-13Refactor ARMv8.3 Pointer Authentication support codeAlexei Fedorov
This patch provides the following features and makes modifications listed below: - Individual APIAKey key generation for each CPU. - New key generation on every BL31 warm boot and TSP CPU On event. - Per-CPU storage of APIAKey added in percpu_data[] of cpu_data structure. - `plat_init_apiakey()` function replaced with `plat_init_apkey()` which returns 128-bit value and uses Generic timer physical counter value to increase the randomness of the generated key. The new function can be used for generation of all ARMv8.3-PAuth keys - ARMv8.3-PAuth specific code placed in `lib\extensions\pauth`. - New `pauth_init_enable_el1()` and `pauth_init_enable_el3()` functions generate, program and enable APIAKey_EL1 for EL1 and EL3 respectively; pauth_disable_el1()` and `pauth_disable_el3()` functions disable PAuth for EL1 and EL3 respectively; `pauth_load_bl31_apiakey()` loads saved per-CPU APIAKey_EL1 from cpu-data structure. - Combined `save_gp_pauth_registers()` function replaces calls to `save_gp_registers()` and `pauth_context_save()`; `restore_gp_pauth_registers()` replaces `pauth_context_restore()` and `restore_gp_registers()` calls. - `restore_gp_registers_eret()` function removed with corresponding code placed in `el3_exit()`. - Fixed the issue when `pauth_t pauth_ctx` structure allocated space for 12 uint64_t PAuth registers instead of 10 by removal of macro CTX_PACGAKEY_END from `include/lib/el3_runtime/aarch64/context.h` and assigning its value to CTX_PAUTH_REGS_END. - Use of MODE_SP_ELX and MODE_SP_EL0 macro definitions in `msr spsel` instruction instead of hard-coded values. - Changes in documentation related to ARMv8.3-PAuth and ARMv8.5-BTI. Change-Id: Id18b81cc46f52a783a7e6a09b9f149b6ce803211 Signed-off-by: Alexei Fedorov <Alexei.Fedorov@arm.com>
2019-09-13Merge changes from topic "jc/rsa-pkcs" into integrationSoby Mathew
* changes: Remove RSA PKCS#1 v1.5 support from cert_tool Add documentation for new KEY_SIZE option Add cert_create tool support for RSA key sizes Support larger RSA key sizes when using MBEDTLS
2019-09-12Remove RSA PKCS#1 v1.5 support from cert_toolJustin Chadwell
Support for PKCS#1 v1.5 was deprecated in SHA 1001202 and fully removed in SHA fe199e3, however, cert_tool is still able to generate certificates in that form. This patch fully removes the ability for cert_tool to generate these certificates. Additionally, this patch also fixes a bug where the issuing certificate was a RSA and the issued certificate was EcDSA. In this case, the issued certificate would be signed using PKCS#1 v1.5 instead of RSAPSS per PKCS#1 v2.1, preventing TF-A from verifying the image signatures. Now that PKCS#1 v1.5 support is removed, all certificates that are signed with RSA now use the more modern padding scheme. Change-Id: Id87d7d915be594a1876a73080528d968e65c4e9a Signed-off-by: Justin Chadwell <justin.chadwell@arm.com>
2019-09-12Add documentation for new KEY_SIZE optionJustin Chadwell
This patch adds documentation for the new KEY_SIZE build option that is exposed by cert_create, and instructions on how to use it. Change-Id: I09b9b052bfdeeaca837e0f0026e2b01144f2472c Signed-off-by: Justin Chadwell <justin.chadwell@arm.com>
2019-09-12Invalidate dcache build option for bl2 entry at EL3Hadi Asyrafi
Some of the platform (ie. Agilex) make use of CCU IPs which will only be initialized during bl2_el3_early_platform_setup. Any operation to the cache beforehand will crash the platform. Hence, this will provide an option to skip the data cache invalidation upon bl2 entry at EL3 Signed-off-by: Hadi Asyrafi <muhammad.hadi.asyrafi.abdul.halim@intel.com> Change-Id: I2c924ed0589a72d0034714c31be8fe57237d1f06
2019-09-12Merge "doc: Updated user guide with new Mbed TLS version number" into ↵Soby Mathew
integration
2019-09-12Merge changes from topic "jc/mte_enable" into integrationSoby Mathew
* changes: Add documentation for CTX_INCLUDE_MTE_REGS Enable MTE support in both secure and non-secure worlds
2019-09-12Merge "Add UBSAN support and handlers" into integrationSoby Mathew
2019-09-12Merge changes from topic "amlogic-refactoring" into integrationSoby Mathew
* changes: amlogic: Fix includes order amlogic: Fix header guards amlogic: Fix prefixes in the SoC specific files amlogic: Fix prefixes in the PM code amlogic: Fix prefixes in the SCPI related code amlogic: Fix prefixes in the MHU code amlogic: Fix prefixes in the SIP/SVC code amlogic: Fix prefixes in the thermal driver amlogic: Fix prefixes in the private header file amlogic: Fix prefixes in the efuse driver amlogic: Fix prefixes in the platform macros file amlogic: Fix prefixes in the helpers file amlogic: Rework Makefiles amlogic: Move the SIP SVC code to common directory amlogic: Move topology file to common directory amlogic: Move thermal code to common directory amlogic: Move MHU code to common directory amlogic: Move efuse code to common directory amlogic: Move platform macros assembly file to common directory amlogic: Introduce unified private header file amlogic: Move SCPI code to common directory amlogic: Move the SHA256 DMA driver to common directory amlogic: Move assembly helpers to common directory amlogic: Introduce directory parameters in the makefiles meson: Rename platform directory to amlogic
2019-09-11Add UBSAN support and handlersJustin Chadwell
This patch adds support for the Undefined Behaviour sanitizer. There are two types of support offered - minimalistic trapping support which essentially immediately crashes on undefined behaviour and full support with full debug messages. The full support relies on ubsan.c which has been adapted from code used by OPTEE. Change-Id: I417c810f4fc43dcb56db6a6a555bfd0b38440727 Signed-off-by: Justin Chadwell <justin.chadwell@arm.com>
2019-09-09Add documentation for CTX_INCLUDE_MTE_REGSJustin Chadwell
A new build flag, CTX_INCLUDE_MTE_REGS, has been added; this patch adds documentation for it in the User Guide along with instructions of what different values mean. Change-Id: I430a9c6ced06b1b6be317edbeff4f5530e30f63a Signed-off-by: Justin Chadwell <justin.chadwell@arm.com>
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