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2018-06-11plat: imx8mq: correct the reg offset of ddr type registerBai Ping
correct the ddr type register's offset. Signed-off-by: Bai Ping <ping.bai@nxp.com>
2018-06-11plat: imx8mq: fix boot hang on ddr4/ddr3l boardBai Ping
Currently, DDR3L/DDR4 board don't support DDR DVFS, So skip ddr switch 3200 mts if the DDR is not LPDDR4. Signed-off-by: Bai Ping <ping.bai@nxp.com>
2018-06-11Update to the latest SCFW API based on commit:Ranjani Vaidyanathan
" commit 97b8a6eed4eee19ec8a60dedfffc2f5f3d8933c5 Author: Chuck Cannon <chuck.cannon@freescale.com> Date: Tue Feb 6 08:54:16 2018 -0600 Add unique ID API call. Required to get info needed for SECO fuse programming. Added info command to DM. " Signed-off-by: Ranjani Vaidyanathan <Ranjani.Vaidyanathan@nxp.com>
2018-06-11plat: imx8mq: update the lpddr4 dvfs and retention flowBai Ping
Update the ddr retenton flow and dvfs flow used on imx8mq lpddr4 board. 1. DVFS flow is changed from hwffc to swffc. 2. frequency setpoint is change from 100mts to 667mts. 3. ddr retention flow is updated to compatible with the new lpddr4 training fw. 4. fix the retention failure issue caused by incorrect reset flow in retention exit. Signed-off-by: Bai Ping <ping.bai@nxp.com>
2018-06-11MLK-17253: Initialize caam sm at bootFranck LENORMAND
At boot, we reset the Secure Memory configuration for imx8mq to a default state giving all the job rings to linux and allowing all accesses from all SDIDs. NOTE: Checkpatch OK. Signed-off-by: Franck LENORMAND <franck.lenormand@nxp.com>
2018-06-11imx8qm: Enable erratum 859971Peng Fan
`ERRATA_A72_859971``: This applies errata 859971 workaround to Cortex-A72 CPU. This needs to be enabled only for revision <= r0p3 of the CPU. 859971: Speculative instruction prefetch to Execute-never (XN) memory could cause deadlock or data integrity issue On i.MX8QM, we are using r0p2, so enable this errata. Signed-off-by: Peng Fan <peng.fan@nxp.com>
2018-06-11plat: imx8mq: Improve the DDR DVFS flow on imx8mqBai Ping
Flush the L1 and L2 cache before DDR frequency change to make sure that no DDR memory access caused by cache activity. Signed-off-by: Bai Ping <ping.bai@nxp.com>
2018-06-11imx8qxp: add return value for cpu kill functionAnson Huang
Enable USE_COHERENT_MEM feature to make sure no cache coherence issue and avoid cache operations in many places; Add return value for cpu kill function. Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
2018-06-11imx8qm: correct cluster/cpu power down sequenceAnson Huang
cluster needs to be power down only after cpus inside it are all powered down, so move all of them into kill function; Enable USE_COHERENT_MEM feature to make sure no cache coherence issue and avoid cache operations in many places; Add return value for cpu kill function. Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Ranjani Vaidyanathan <Ranjani.Vaidyanathan@nxp.com>
2018-06-11imx: Add bakery_lock to sc_call_rpcLeonard Crestez
It is possible for multiple cores to do attempt RPC calls and without locking this can result in corrupt messages on the SCFW side. This is particularly visible with cpuidle. This needs to be a bakery_lock because on the wakeup path psci_cpu_suspend_finish calls the platform's pwr_domain_suspend_finish before enabling the data cache. Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com> Reviewed-by: Anson Huang <anson.huang@nxp.com>
2018-06-11imx8qm/imx8qxp: enlarge MAX_XLAT_TABLES to make debug version workAnson Huang
In worse case, MAX_XLAT_TABLES needs to be equal to MAX_MMAP_REGIONS, enlarge MAX_XLAT_TABLES to make debug version ATF can boot up, otherwise, it may fail at below: ASSERT: lib/xlat_tables/xlat_tables_common.c <362> Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
2018-06-11MLK-17373 Fix ATF version string generationYe Li
Since we use ATF version string to provide commit id, we must ensure the commit id is in this string. But when a commit is tagged, the git describe will default output the tag string. Add the '--long' option to output a full string with commit id contained. Signed-off-by: Ye Li <ye.li@nxp.com>
2018-06-11imx8: export get build info for all i.mx8Peng Fan
Export build info for all i.mx8 Signed-off-by: Peng Fan <peng.fan@nxp.com>
2018-06-11imx8mq: move stack to ocram_sPeng Fan
Add an ocram_s mmap entry Merge mmap entry to use 2MB aligned base and size to shrink the final mmu table size. Move stack to ocram_s Signed-off-by: Peng Fan <peng.fan@nxp.com>
2018-06-11Add low power state requests:Ranjani Vaidyanathan
1. Request to DRC switch to STBY in low power. 2. Set GIC to LP mode once GIC interface has been disabled in low power flow. Signed-off-by: Ranjani Vaidyanathan <Ranjani.Vaidyanathan@nxp.com>
2018-06-11MLK-17111: crypto: caam: Configure job rings master IDAymen Sghaier
For i.MX8MQ B0 revision the default configuration of JRaMID is not valid to allow Kernel use CAAM job ring. This patch set the Master ID of Cortex A in the JRaMID registers. Signed-off-by: Aymen Sghaier <aymen.sghaier@nxp.com>
2018-06-11imx8mq: add SIP for NOC settingsAnson Huang
On i.MX8MQ, NOC may need different settings for different use cases, so add SIP for NOC settings. Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
2018-06-11plat: imx: Update the DDR performance settingBai Ping
Update the DDR performance setting when out of retention. Signed-off-by: Bai Ping <ping.bai@nxp.com>
2018-06-11imx8mq: Add HAB supportYe Li
Since the HAB only works in secure mode. The BL33 runs at EL2 non-secure can't intialize the HAB successfully. So add the SIP call for these HAB interfaces, BL33 will trap to ATF to run the HAB. The HAB codes locates in ROM, and need to access OCRAM, CAAM RAM and DDR to authenticate image. Add these relevant memory region to MMU. Also extend the stack size of each core to avoid stack overflow by HAB. Signed-off-by: Ye Li <ye.li@nxp.com>
2018-06-11plat: freescale: imx8qm/qxp: add poweroffRobin Gong
Add power off interface for Linux. Currently poweroff the whole board,may change to poweroff partition if necessary. sync with the below scfw commit: commit 0e1f8aa5d6c6a6d9b8c05d5a84bbd613b301d367 Author: Chuck Cannon <chuck.cannon@freescale.com> Date: Tue Nov 28 13:56:29 2017 -0600 Use SC_R_BOARD_R1 to control the base board reset. Signed-off-by: Chuck Cannon <chuck.cannon@freescale.com> Signed-off-by: Robin Gong <yibin.gong@nxp.com>
2018-06-11imx8mq: disable default rdc and csu configurations to fix boot blockAymen Sghaier
Enabling the default csu configuration lead to block boot on testing boards. Signed-off-by: Aymen Sghaier <aymen.sghaier@nxp.com>
2018-06-11imx8mq: Add rdc supportAymen Sghaier
Enable the RDC driver for i.MX8MQ platform with a default settings as an example. Signed-off-by: Aymen Sghaier <aymen.sghaier@nxp.com>
2018-06-11imx8mq: Add csu supportAymen Sghaier
Enable the CSU driver for i.MX8MQ platform with a default settings as an example. Signed-off-by: Aymen Sghaier <aymen.sghaier@nxp.com>
2018-06-11Request the appropriate modes for runtime and low power for DDR, MU,Ranjani Vaidyanathan
system interconnect etc. Signed-off-by: Ranjani Vaidyanathan <Ranjani.Vaidyanathan@nxp.com>
2018-06-11Update SCFW API based on commit 0245582bf4a58Ranjani Vaidyanathan
"commit 0245582bf4a58289e25c59fb0befe84923ca6742 Author: Ranjani Vaidyanathan <Ranjani.Vaidyanathan@nxp.com> Date: Fri Nov 17 13:43:30 2017 -0600 Fix bug in system interface PM code. Also ensure that DB/DBLOGIC is powered up before MU. " Signed-off-by: Ranjani Vaidyanathan <Ranjani.Vaidyanathan@nxp.com>
2018-06-11plat: imx: imx8qm/qxp: add watchdog pretimeout/status_get interfacesRobin Gong
Add watchdog pretimeout/status interfaces to sync with scfw. Signed-off-by: Robin Gong <yibin.gong@nxp.com>
2018-06-11plat: imx8mq: fix the stack overflow issue on imx8mqBai Ping
the previous stack size is small, the stack will very easy to overflow, then lead to ATF not work. So increase the stack size to fix this issue. Signed-off-by: Bai Ping <ping.bai@nxp.com>
2018-06-11plat: imx8mq: fix the system wakeup by non-wakeup IRQ.Bai Ping
When system enter suspend, it should be only wakeup by specific wakeup source, so non-wakeup source should be masked before enter suspend. Signed-off-by: Bai Ping <ping.bai@nxp.com>
2018-06-11plat: imx8mq: enable cpuidle support on iMX8MQBai Ping
Refact the PSCI related code. Enable cpuidle support on i.MX8MQ for CPU idle support. Signed-off-by: Bai Ping <ping.bai@nxp.com>
2018-06-11imx: imx8mq: add SOC info SIP support for i.MX8MQAnson Huang
i.MX8MQ does NOT update revision info in ANATOP_DIGPROG register, so the revision info needs to read from ROM, for security reason, this needs to be done in ATF, so add this SIP support for kernel. The A0 chip's ROM version is located at 0x800, and B0 chip is located at 0x83c. Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
2018-06-11imx8mq: add src sip to handle m4Peng Fan
Add src sip to handle M4 boot and status check Signed-off-by: Peng Fan <peng.fan@nxp.com>
2018-06-11plat: imx8mq: update the ddrc and phy configBai Ping
update the ddrc and phy config info, add more register config for other frequency point. Signed-off-by: Bai Ping <ping.bai@nxp.com>
2018-06-11plat: imx8mq add ddr frequency support on imx8mqBai Ping
When changing the DDR frequency, the DDRC will block AXI access, so the code for changing the frequency need to be run on OCRAM not make sure no DDR access at this stage. the DDR frequency change request is from EL1 linux kernel side, we use the SiP service call to trap the DDR frequency change operation from linux kernel to ATF. Signed-off-by: Bai Ping <ping.bai@nxp.com>
2018-06-11imx8mq: pass TEE address and size to BL33Peng Fan
Pass TEE address space to BL33 to avoid uboot relocation touch this space. Signed-off-by: Peng Fan <peng.fan@nxp.com>
2018-06-11plat: imx8mq add ddr retention support for imx8mqBai Ping
Enable the DDR retention support on imx8mq. when DDR retention is enabled, the non-fast wakeup mode can be enabled at the same time. Signed-off-by: Bai Ping <ping.bai@nxp.com>
2018-06-11plat: imx8mq: add mmmap for aips1 spaceBai Ping
map the whole AIPS1 space, so we don't need to create map for individual peripheral region. Signed-off-by: Bai Ping <ping.bai@nxp.com>
2018-06-11imx8qm/qxp: add watchdog sip interfacesRobin Gong
To support virtual watchdog driver in Linux, add those watchdog functions to call scfw interface in ATF. Signed-off-by: Robin Gong <yibin.gong@nxp.com>
2018-06-11imx8qm: add cluster power on/off for cpu hot-plug and suspendAnson Huang
When doing cpu hot-plug, if all CPUs in same cluster are off, then this cluster's power and CCI port can be also turned off to save power. Also add cluster and CCI low power mode request to SCFW. Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
2018-06-11imx8qxp: add A35 cluster low power mode in suspendAnson Huang
Request A35 cluster low power mode to off to SCFW, when suspend, SCFW will turn off A35 cluster. Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
2018-06-11imx8mq: add TEE supportPeng Fan
TEE entry is defined as 0xFE000000. When there is SPD passed to makefile , TEE_IMX8 will be defined. Compiling OP-TEE support using "make PLAT=imx8mq bl31 SPD=opteed" Note: Since TEE image is located at DRAM 0xFE000000, so need to reserve this space in UBoot and Kernel, by using gd->dram_size = PHYS_SDRAM_SIZE - SZ_32M or else. Signed-off-by: Peng Fan <peng.fan@nxp.com>
2018-06-11imx8mq: change the BL31 load address to ocramBai Ping
Change the BL31 load address to ocram so we can put DDR into low power mode as needed. Signed-off-by: Bai Ping <ping.bai@nxp.com>
2018-06-11relocate the xlat_table section into ocram_sBai Ping
On i.MX8MQ, we may need to run ATF in ocram space, but the ocram space is limited, can NOT put all the sections into it, so move the xlat_table section into OCRAM_S. Signed-off-by: Bai Ping <ping.bai@nxp.com>
2018-06-11imx8qxp: add suspend/resume supportAnson Huang
Add suspend/resume support with all CPUs power down. Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
2018-06-11imx8qm: add suspend/resume supportAnson Huang
Add suspend/resume support with all CPUs power down. Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
2018-06-11Add SCFW APIs to support suspend/resumeAnson Huang
Add SCFW APIs to support suspend/resume with all CPUs power down. Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
2018-06-11imx: replace all GPL with BSD identifier.Anson Huang
Replace all GPL with BSD identifier. Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
2018-06-11imx8qm/qxp: Add a new SIP to get commit id of arm trusted firmwareYe Li
Add a new SIP call FSL_SIP_BUILDINFO to return the current commit id in 7 hexadecimal digits which are parsed from the version_string. Signed-off-by: Ye Li <ye.li@nxp.com>
2018-06-11imx: cpufreq: fix build error using poky tool chainAnson Huang
Fix below build error on i.MX8QXP when using poky tool chain: CC plat/imx/common/cpufreq.c plat/imx/common/cpufreq.c:27:18: error: "ap_cluster_index" defined but not used [-Werror=unused-const-variable=] Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
2018-06-11i.mx8qm/i.mx8qxp: psci: add power off supportAnson Huang
Add system_off pcsi callback to avoid below kernel message when doing power off: [11613.953711] reboot: Power down [11613.958318] systemd-shutdow: 8 output lines suppressed due to ratelimiting [11613.965285] Kernel panic - not syncing: Attempted to kill init! exitcode=0x00 [11613.965285] [11613.974441] CPU: 0 PID: 1 Comm: systemd-shutdow Not tainted 4.9.11-03354-g0e1 [11613.982369] Hardware name: Freescale i.MX8QXP LPDDR4 ARM2 (DT) [11613.988216] Call trace: [11613.990681] [<ffff0000080882bc>] dump_backtrace+0x0/0x1a8 [11613.996092] [<ffff000008088478>] show_stack+0x14/0x1c [11614.001154] [<ffff0000083aaf98>] dump_stack+0x8c/0xac [11614.006213] [<ffff000008162aac>] panic+0x124/0x28c [11614.011016] [<ffff0000080c0b20>] complete_and_exit+0x0/0x20 [11614.016600] [<ffff0000080dc6d8>] SyS_reboot+0x168/0x244 [11614.021829] [<ffff000008082ef0>] el0_svc_naked+0x24/0x28 [11614.027153] Kernel Offset: disabled [11614.030646] Memory Limit: none [11614.040755] ---[ end Kernel panic - not syncing: Attempted to kill init! exi0 [11614.040755] As there is no system power off SCFW API available now, so just simply do wfi and never return when system_off is called. Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
2018-06-11imx8mq: gpc: correct ARM power down request register offsetAnson Huang
The GPC_CPU_PGC_SW_PDN_REQ offset should be 0xfc, previous offset is incorrect, so actually ARM core is NOT powered down and the power leakage is very high. With this fix, each ARM core's leakage is about 25mA@0.9V. Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
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