diff options
Diffstat (limited to 'plat/imx/imx8mq/src.c')
| -rw-r--r-- | plat/imx/imx8mq/src.c | 28 |
1 files changed, 23 insertions, 5 deletions
diff --git a/plat/imx/imx8mq/src.c b/plat/imx/imx8mq/src.c index abaf0547..eb36c239 100644 --- a/plat/imx/imx8mq/src.c +++ b/plat/imx/imx8mq/src.c @@ -71,8 +71,7 @@ int imx_soc_handler(uint32_t smc_fid, u_register_t x1, u_register_t x2, int imx_noc_handler(uint32_t smc_fid, u_register_t x1, u_register_t x2, u_register_t x3) { - switch(x1) { - case FSL_SIP_NOC_LCDIF: + if (FSL_SIP_NOC_LCDIF == x1) { /* config NOC for VPU */ mmio_write_32(IMX_NOC_BASE + 0x108, 0x34); mmio_write_32(IMX_NOC_BASE + 0x10c, 0x1); @@ -83,10 +82,29 @@ int imx_noc_handler(uint32_t smc_fid, u_register_t x1, u_register_t x2, mmio_write_32(IMX_NOC_BASE + 0x18c, 0x1); mmio_write_32(IMX_NOC_BASE + 0x190, 0x500); mmio_write_32(IMX_NOC_BASE + 0x194, 0x30); - break; - default: + } else if (FSL_SIP_NOC_PRIORITY == x1) { + switch(x2) { + case NOC_GPU_PRIORITY: + mmio_write_32(IMX_NOC_BASE + 0x008, x3); + break; + case NOC_DCSS_PRIORITY: + mmio_write_32(IMX_NOC_BASE + 0x088, x3); + break; + case NOC_VPU_PRIORITY: + mmio_write_32(IMX_NOC_BASE + 0x108, x3); + break; + case NOC_CPU_PRIORITY: + mmio_write_32(IMX_NOC_BASE + 0x188, x3); + break; + case NOC_MIX_PRIORITY: + mmio_write_32(IMX_NOC_BASE + 0x288, x3); + break; + default: + return SMC_UNK; + }; + } else { return SMC_UNK; - }; + } return 0; } |