diff options
Diffstat (limited to 'plat/imx/imx8m/imx8mq/include/imx_sec_def.h')
| -rw-r--r-- | plat/imx/imx8m/imx8mq/include/imx_sec_def.h | 284 |
1 files changed, 284 insertions, 0 deletions
diff --git a/plat/imx/imx8m/imx8mq/include/imx_sec_def.h b/plat/imx/imx8m/imx8mq/include/imx_sec_def.h new file mode 100644 index 00000000..dfe308ef --- /dev/null +++ b/plat/imx/imx8m/imx8mq/include/imx_sec_def.h @@ -0,0 +1,284 @@ +/* + * Copyright 2020 NXP + * + * SPDX-License-Identifier: BSD-3-Clause + */ + +#ifndef IMX_SEC_DEF_H +#define IMX_SEC_DEF_H + +/* RDC MDA index */ +enum rdc_mda_idx { + RDC_MDA_A53 = 0, + RDC_MDA_M4 = 1, + RDC_MDA_PCIE_CTRL1 = 2, + RDC_MDA_PCIE_CTRL2 = 3, + RDC_MDA_VPU_DEC = 4, + RDC_MDA_LCDIF = 5, + RDC_MDA_CSI1 = 6, + RDC_MDA_CSI2 = 7, + RDC_MDA_Coresight = 8, + RDC_MDA_DAP = 9, + RDC_MDA_CAAM = 10, + RDC_MDA_SDMAp = 11, + RDC_MDA_SDMAb = 12, + RDC_MDA_APBHDMA = 13, + RDC_MDA_RAWNAND = 14, + RDC_MDA_uSDHC1 = 15, + RDC_MDA_uSDHC2 = 16, + RDC_MDA_DCSS = 17, + RDC_MDA_GPU = 18, + RDC_MDA_USB1 = 19, + RDC_MDA_USB2 = 20, + RDC_MDA_TESTPORT = 21, + RDC_MDA_ENET1_TX = 22, + RDC_MDA_ENET1_RX = 23, + RDC_MDA_SDMA2 = 24, + RDC_MDA_Reserved = 25, + RDC_MDA_SDMA1 = 26, +}; + +/* RDC Peripherals index */ +enum rdc_pdap_idx { + RDC_PDAP_GPIO1 = 0, + RDC_PDAP_GPIO2 = 1, + RDC_PDAP_GPIO3 = 2, + RDC_PDAP_GPIO4 = 3, + RDC_PDAP_GPIO5 = 4, + RDC_PDAP_Reserved1 = 5, + RDC_PDAP_ANA_TSENSOR = 6, + RDC_PDAP_ANA_OSC = 7, + RDC_PDAP_WDOG1 = 8, + RDC_PDAP_WDOG2 = 9, + RDC_PDAP_WDOG3 = 10, + RDC_PDAP_Reserved2 = 11, + RDC_PDAP_SDMA2 = 12, + RDC_PDAP_GPT1 = 13, + RDC_PDAP_GPT2 = 14, + RDC_PDAP_GPT3 = 15, + RDC_PDAP_Reserved3 = 16, + RDC_PDAP_ROMCP = 17, + RDC_PDAP_LCDIF = 18, + RDC_PDAP_IOMUXC = 19, + RDC_PDAP_IOMUXC_GPR = 20, + RDC_PDAP_OCOTP_CTRL = 21, + RDC_PDAP_ANATOP_PLL = 22, + RDC_PDAP_SNVS_HP = 23, + RDC_PDAP_CCM = 24, + RDC_PDAP_SRC = 25, + RDC_PDAP_GPC = 26, + RDC_PDAP_SEMAPHORE1 = 27, + RDC_PDAP_SEMAPHORE2 = 28, + RDC_PDAP_RDC = 29, + RDC_PDAP_CSU = 30, + RDC_PDAP_Reserved4 = 31, + RDC_PDAP_MST0 = 32, + RDC_PDAP_MST1 = 33, + RDC_PDAP_MST2 = 34, + RDC_PDAP_MST3 = 35, + RDC_PDAP_HDMI_SEC = 36, + RDC_PDAP_Reserved5 = 37, + RDC_PDAP_PWM1 = 38, + RDC_PDAP_PWM2 = 39, + RDC_PDAP_PWM3 = 40, + RDC_PDAP_PWM4 = 41, + RDC_PDAP_SysCounter_RD = 42, + RDC_PDAP_SysCounter_CMP = 43, + RDC_PDAP_SysCounter_CTRL = 44, + RDC_PDAP_HDMI_CTRL = 45, + RDC_PDAP_GPT6 = 46, + RDC_PDAP_GPT5 = 47, + RDC_PDAP_GPT4 = 48, + RDC_PDAP_TZASC = 56, + RDC_PDAP_MTR = 59, + RDC_PDAP_PERFMON1 = 60, + RDC_PDAP_PERFMON2 = 61, + RDC_PDAP_PLATFORM_CTRL = 62, + RDC_PDAP_QoSC = 63, + RDC_PDAP_MIPI_PHY = 64, + RDC_PDAP_MIPI_DSI = 65, + RDC_PDAP_I2C1 = 66, + RDC_PDAP_I2C2 = 67, + RDC_PDAP_I2C3 = 68, + RDC_PDAP_I2C4 = 69, + RDC_PDAP_UART4 = 70, + RDC_PDAP_MIPI_CSI1 = 71, + RDC_PDAP_MIPI_CSI_PHY1 = 72, + RDC_PDAP_CSI1 = 73, + RDC_PDAP_MU_A = 74, + RDC_PDAP_MU_B = 75, + RDC_PDAP_SEMAPHORE_HS = 76, + RDC_PDAP_Reserved6 = 77, + RDC_PDAP_SAI1 = 78, + RDC_PDAP_Reserved7 = 79, + RDC_PDAP_SAI6 = 80, + RDC_PDAP_SAI5 = 81, + RDC_PDAP_SAI4 = 82, + RDC_PDAP_Reserved8 = 83, + RDC_PDAP_USDHC1 = 84, + RDC_PDAP_USDHC2 = 85, + RDC_PDAP_MIPI_CSI2 = 86, + RDC_PDAP_MIPI_CSI_PHY2 = 87, + RDC_PDAP_CSI2 = 88, + RDC_PDAP_Reserved9 = 89, + RDC_PDAP_Reserved10 = 90, + RDC_PDAP_QSPI = 91, + RDC_PDAP_Reserved11 = 92, + RDC_PDAP_SDMA1 = 93, + RDC_PDAP_ENET1 = 94, + RDC_PDAP_Reserved12 = 95, + RDC_PDAP_Reserved13 = 96, + RDC_PDAP_SPDIF1 = 97, + RDC_PDAP_ECSPI1 = 98, + RDC_PDAP_ECSPI2 = 99, + RDC_PDAP_ECSPI3 = 100, + RDC_PDAP_Reserved14 = 101, + RDC_PDAP_UART1 = 102, + RDC_PDAP_Reserved15 = 103, + RDC_PDAP_UART3 = 104, + RDC_PDAP_UART2 = 105, + RDC_PDAP_SPDIF2 = 106, + RDC_PDAP_SAI2 = 107, + RDC_PDAP_SAI3 = 108, + RDC_PDAP_Reserved16 = 109, + RDC_PDAP_Reserved17 = 110, + RDC_PDAP_SPBA1 = 111, + RDC_PDAP_CAAM = 114, + RDC_PDAP_DDRC_SEC = 115, + RDC_PDAP_GIC_EXSC = 116, + RDC_PDAP_USB_EXSC = 117, + RDC_PDAP_OCRAM_TZ = 118, + RDC_PDAP_OCRAM_S_TZ = 119, + RDC_PDAP_VPU_SEC = 120, + RDC_PDAP_DAP_EXSC = 121, + RDC_PDAP_ROMCP_SEC = 122, + RDC_PDAP_APBHDMA_SEC = 123, + RDC_PDAP_M4_SEC = 124, + RDC_PDAP_QSPI_SEC = 125, + RDC_PDAP_GPU_EXSC = 126, + RDC_PDAP_PCIE = 127, +}; + +enum csu_csln_idx { + CSU_CSLn_GPIO1 = 0, + CSU_CSLn_GPIO2 = 1, + CSU_CSLn_GPIO3 = 2, + CSU_CSLn_GPIO4 = 3, + CSU_CSLn_GPIO5 = 4, + CSU_CSLn_Reserved1 = 5, + CSU_CSLn_ANA_TSENSOR = 6, + CSU_CSLn_ANA_OSC = 7, + CSU_CSLn_WDOG1 = 8, + CSU_CSLn_WDOG2 = 9, + CSU_CSLn_WDOG3 = 10, + CSU_CSLn_Reserved2 = 11, + CSU_CSLn_SDMA2 = 12, + CSU_CSLn_GPT1 = 13, + CSU_CSLn_GPT2 = 14, + CSU_CSLn_GPT3 = 15, + CSU_CSLn_Reserved3 = 16, + CSU_CSLn_ROMCP = 17, + CSU_CSLn_LCDIF = 18, + CSU_CSLn_IOMUXC = 19, + CSU_CSLn_IOMUXC_GPR = 20, + CSU_CSLn_OCOTP_CTRL = 21, + CSU_CSLn_ANATOP_PLL = 22, + CSU_CSLn_SNVS_HP = 23, + CSU_CSLn_CCM = 24, + CSU_CSLn_SRC = 25, + CSU_CSLn_GPC = 26, + CSU_CSLn_SEMAPHORE1 = 27, + CSU_CSLn_SEMAPHORE2 = 28, + CSU_CSLn_RDC = 29, + CSU_CSLn_CSU = 30, + CSU_CSLn_Reserved4 = 31, + CSU_CSLn_MST0 = 32, + CSU_CSLn_MST1 = 33, + CSU_CSLn_MST2 = 34, + CSU_CSLn_MST3 = 35, + CSU_CSLn_HDMI_SEC = 36, + CSU_CSLn_Reserved5 = 37, + CSU_CSLn_PWM1 = 38, + CSU_CSLn_PWM2 = 39, + CSU_CSLn_PWM3 = 40, + CSU_CSLn_PWM4 = 41, + CSU_CSLn_SysCounter_RD = 42, + CSU_CSLn_SysCounter_CMP = 43, + CSU_CSLn_SysCounter_CTRL = 44, + CSU_CSLn_HDMI_CTRL = 45, + CSU_CSLn_GPT6 = 46, + CSU_CSLn_GPT5 = 47, + CSU_CSLn_GPT4 = 48, + CSU_CSLn_TZASC = 56, + CSU_CSLn_MTR = 59, + CSU_CSLn_PERFMON1 = 60, + CSU_CSLn_PERFMON2 = 61, + CSU_CSLn_PLATFORM_CTRL = 62, + CSU_CSLn_QoSC = 63, + CSU_CSLn_MIPI_PHY = 64, + CSU_CSLn_MIPI_DSI = 65, + CSU_CSLn_I2C1 = 66, + CSU_CSLn_I2C2 = 67, + CSU_CSLn_I2C3 = 68, + CSU_CSLn_I2C4 = 69, + CSU_CSLn_UART4 = 70, + CSU_CSLn_MIPI_CSI1 = 71, + CSU_CSLn_MIPI_CSI_PHY1 = 72, + CSU_CSLn_CSI1 = 73, + CSU_CSLn_MU_A = 74, + CSU_CSLn_MU_B = 75, + CSU_CSLn_SEMAPHORE_HS = 76, + CSU_CSLn_Internal1 = 77, + CSU_CSLn_SAI1 = 78, + CSU_CSLn_Reserved7 = 79, + CSU_CSLn_SAI6 = 80, + CSU_CSLn_SAI5 = 81, + CSU_CSLn_SAI4 = 82, + CSU_CSLn_Internal2 = 83, + CSU_CSLn_USDHC1 = 84, + CSU_CSLn_USDHC2 = 85, + CSU_CSLn_MIPI_CSI2 = 86, + CSU_CSLn_MIPI_CSI_PHY2 = 87, + CSU_CSLn_CSI2 = 88, + CSU_CSLn_Internal3 = 89, + CSU_CSLn_Reserved10 = 90, + CSU_CSLn_QSPI = 91, + CSU_CSLn_Reserved11 = 92, + CSU_CSLn_SDMA1 = 93, + CSU_CSLn_ENET1 = 94, + CSU_CSLn_Reserved12 = 95, + CSU_CSLn_Internal4 = 96, + CSU_CSLn_SPDIF1 = 97, + CSU_CSLn_ECSPI1 = 98, + CSU_CSLn_ECSPI2 = 99, + CSU_CSLn_ECSPI3 = 100, + CSU_CSLn_Reserved14 = 101, + CSU_CSLn_UART1 = 102, + CSU_CSLn_Internal5 = 103, + CSU_CSLn_UART3 = 104, + CSU_CSLn_UART2 = 105, + CSU_CSLn_SPDIF2 = 106, + CSU_CSLn_SAI2 = 107, + CSU_CSLn_SAI3 = 108, + CSU_CSLn_Reserved16 = 109, + CSU_CSLn_Internal6 = 110, + CSU_CSLn_SPBA1 = 111, + CSU_CSLn_MOD_EN3 = 112, + CSU_CSLn_MOD_EN0 = 113, + CSU_CSLn_CAAM = 114, + CSU_CSLn_DDRC_SEC = 115, + CSU_CSLn_GIC_EXSC = 116, + CSU_CSLn_USB_EXSC = 117, + CSU_CSLn_OCRAM_TZ = 118, + CSU_CSLn_OCRAM_S_TZ = 119, + CSU_CSLn_VPU_SEC = 120, + CSU_CSLn_DAP_EXSC = 121, + CSU_CSLn_ROMCP_SEC = 122, + CSU_CSLn_APBHDMA_SEC = 123, + CSU_CSLn_M4_SEC = 124, + CSU_CSLn_QSPI_SEC = 125, + CSU_CSLn_GPU_EXSC = 126, + CSU_CSLn_PCIE = 127, +}; + +#endif /* IMX_SEC_DEF_H */ |