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Diffstat (limited to 'plat/imx/imx8m/imx8mq/gpc.c')
-rw-r--r--plat/imx/imx8m/imx8mq/gpc.c30
1 files changed, 30 insertions, 0 deletions
diff --git a/plat/imx/imx8m/imx8mq/gpc.c b/plat/imx/imx8m/imx8mq/gpc.c
index c15c8739..2baa027e 100644
--- a/plat/imx/imx8m/imx8mq/gpc.c
+++ b/plat/imx/imx8m/imx8mq/gpc.c
@@ -292,6 +292,36 @@ void imx_set_cluster_powerdown(unsigned int last_core, uint8_t power_state)
}
}
+#define MAX_PLL_NUM 12
+
+struct pll_override imx8mq_pll[MAX_PLL_NUM] = {
+ {.reg = 0x0, .override_mask = 0x140000, },
+ {.reg = 0x8, .override_mask = 0x140000, },
+ {.reg = 0x10, .override_mask = 0x140000, },
+ {.reg = 0x18, .override_mask = 0x140000, },
+ {.reg = 0x20, .override_mask = 0x140000, },
+ {.reg = 0x28, .override_mask = 0x140000, },
+ {.reg = 0x30, .override_mask = 0x1555540, },
+ {.reg = 0x3c, .override_mask = 0x1555540, },
+ {.reg = 0x48, .override_mask = 0x140, },
+ {.reg = 0x54, .override_mask = 0x140, },
+ {.reg = 0x60, .override_mask = 0x140, },
+ {.reg = 0x70, .override_mask = 0xa, },
+};
+
+void imx_anamix_override(bool enter)
+{
+ int i;
+
+ /* enable the pll override bit before entering DSM mode */
+ for (i = 0; i < MAX_PLL_NUM; i++) {
+ if (enter)
+ mmio_setbits_32(IMX_ANAMIX_BASE + imx8mq_pll[i].reg, imx8mq_pll[i].override_mask);
+ else
+ mmio_clrbits_32(IMX_ANAMIX_BASE + imx8mq_pll[i].reg, imx8mq_pll[i].override_mask);
+ }
+}
+
int imx_gpc_handler(uint32_t smc_fid,
u_register_t x1,
u_register_t x2,