diff options
Diffstat (limited to 'include')
| -rw-r--r-- | include/bl1/bl1.h | 5 | ||||
| -rw-r--r-- | include/lib/cpus/aarch64/cortex_a55.h | 22 | ||||
| -rw-r--r-- | include/lib/cpus/aarch64/cortex_a75.h | 22 |
3 files changed, 47 insertions, 2 deletions
diff --git a/include/bl1/bl1.h b/include/bl1/bl1.h index 8f4f992c..15445235 100644 --- a/include/bl1/bl1.h +++ b/include/bl1/bl1.h @@ -39,11 +39,12 @@ #define FWU_SMC_IMAGE_RESUME 0x13 #define FWU_SMC_SEC_IMAGE_DONE 0x14 #define FWU_SMC_UPDATE_DONE 0x15 +#define FWU_SMC_IMAGE_RESET 0x16 /* * Number of FWU calls (above) implemented */ -#define FWU_NUM_SMC_CALLS 6 +#define FWU_NUM_SMC_CALLS 7 #if TRUSTED_BOARD_BOOT # define BL1_NUM_SMC_CALLS (FWU_NUM_SMC_CALLS + 4) @@ -56,7 +57,7 @@ * calls from the SMC function ID */ #define FWU_SMC_FID_START FWU_SMC_IMAGE_COPY -#define FWU_SMC_FID_END FWU_SMC_UPDATE_DONE +#define FWU_SMC_FID_END FWU_SMC_IMAGE_RESET #define is_fwu_fid(_fid) \ ((_fid >= FWU_SMC_FID_START) && (_fid <= FWU_SMC_FID_END)) diff --git a/include/lib/cpus/aarch64/cortex_a55.h b/include/lib/cpus/aarch64/cortex_a55.h new file mode 100644 index 00000000..293f2b24 --- /dev/null +++ b/include/lib/cpus/aarch64/cortex_a55.h @@ -0,0 +1,22 @@ +/* + * Copyright (c) 2017, ARM Limited and Contributors. All rights reserved. + * + * SPDX-License-Identifier: BSD-3-Clause + */ + +#ifndef __CORTEX_A55_H__ +#define __CORTEX_A55_H__ + +/* Cortex-A55 MIDR for revision 0 */ +#define CORTEX_A55_MIDR 0x410fd050 + +/******************************************************************************* + * CPU Extended Control register specific definitions. + ******************************************************************************/ +#define CORTEX_A55_CPUPWRCTLR_EL1 S3_0_C15_C2_7 +#define CORTEX_A55_CPUECTLR_EL1 S3_0_C15_C1_4 + +/* Definitions of register field mask in CORTEX_A55_CPUPWRCTLR_EL1 */ +#define CORTEX_A55_CORE_PWRDN_EN_MASK 0x1 + +#endif /* __CORTEX_A55_H__ */ diff --git a/include/lib/cpus/aarch64/cortex_a75.h b/include/lib/cpus/aarch64/cortex_a75.h new file mode 100644 index 00000000..1ffe20bb --- /dev/null +++ b/include/lib/cpus/aarch64/cortex_a75.h @@ -0,0 +1,22 @@ +/* + * Copyright (c) 2017, ARM Limited and Contributors. All rights reserved. + * + * SPDX-License-Identifier: BSD-3-Clause + */ + +#ifndef __CORTEX_A75_H__ +#define __CORTEX_A75_H__ + +/* Cortex-A75 MIDR */ +#define CORTEX_A75_MIDR 0x410fd0a0 + +/******************************************************************************* + * CPU Extended Control register specific definitions. + ******************************************************************************/ +#define CORTEX_A75_CPUPWRCTLR_EL1 S3_0_C15_C2_7 +#define CORTEX_A75_CPUECTLR_EL1 S3_0_C15_C1_4 + +/* Definitions of register field mask in CORTEX_A75_CPUPWRCTLR_EL1 */ +#define CORTEX_A75_CORE_PWRDN_EN_MASK 0x1 + +#endif /* __CORTEX_A75_H__ */ |